Method of making a planar trench semiconductor structure

Details Method of making a planar trench semiconductor structure Method of making a planar trench semiconductor structure

1985-10-31

1987-03-31

Cintins, Ivars

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

29576W, 29580, 1566591, H01L 21308

Patent

active

046541209

ABSTRACT:
A method is provided for making a planar surface on a semiconductor substrate having a trench or groove formed therein and filled with a material such as an organic material which may be used to electrically isolate one region of the substrate from an adjacent region of the substrate. The method includes the steps of forming a trench or groove in a semiconductor substrate through a surface thereof, depositing an organic or other filling material on the surface of the substrate and into the trench, forming a block of material over the trench on the filling material so as to extend a given distance over the surface of the substrate, etching the filling material with a given etchant so as to remove the filling material disposed over the surface of the substrate until only a segment of the filling material remains over the trench and above the surface of the substrate, forming a layer of material over the surface of the semiconductor substrate so as to cover the segment of the filling material, with the layer of material and the filling material having similar etch rates, and etching simultaneously the layer of material and the segment of the filling material until all of the layer of material is removed from the surface of the semiconductor substrate. In a preferred embodiment of this invention, the filling material is polyimide, the block of material and the layer of material are photoresists and each of the etching steps is carried out with a directional dry etching process using 100% oxygen gas as the etchant.

REFERENCES:
patent: 4396460 (1983-08-01), Tamaki et al.
patent: 4519128 (1985-05-01), Chesebro et al.
patent: 4545852 (1985-10-01), Barton
IBM Technical Disclosure Bulletin, vol. 17, No. 10, Mar. 1975, "Forming Sidewall Dielectric Isolation of Integrated Circuit Devices", by P. M. Schaible et al, pp. 2893-2894.
IBM Technical Disclosure Bulletin, vol. 24, No. 11A, Apr. 1982, "Dielectric Isolation Process", by M. D. Hulvey et al, pp. 5458-5459.
IBM Technical Disclosure Bulletin, vol. 23, No. 11, Apr. 1981, "Prevention of Birdsbeak Formation", by I. Antipov, pp. 4917-4919.
IBM Technical Disclosure Bulletin, vol. 25, No. 11B, Apr. 1983, "Forming Wide Trench Dielectric Isolation", by P. J. Tsang, pp. 6129-6130.

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