Method of making a non-volatile floating gate memory device with

Details Method of making a non-volatile floating gate memory device with Method of making a non-volatile floating gate memory device with

1993-08-02

1995-12-05

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 48, 257316, 257321, H01L 218247

Patent

active

054728924

ABSTRACT:
The present invention discloses a non-volatile memory device having a multi-level gate structure. The storage cell transistor in the cell array region and the transistor in the peripheral circuit region have the same multi-level gate structure. Also, multi-level polycrystalline silicon layers in the peripheral circuit region are connected to each other, and thus utilized as an electrically singular gate electrode. The gate structures of the two regions are formed through a single etching process, so that the decreased processing number of photolithography simplifies overall process, and reduces the damage on the field oxide layer to thereby enhance an insulating performance.

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patent: 4810666 (1989-03-01), Taji
patent: 5158902 (1992-10-01), Hanada
patent: 5281548 (1994-01-01), Prall
patent: 5304503 (1994-04-01), Yoon et al.

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