Method of making a dual damascene interconnect structure using l

Details Method of making a dual damascene interconnect structure using l Method of making a dual damascene interconnect structure using l

1997-08-20

2000-08-08

Niebling, John F.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438622, 438623, 438627, 438643, 438636, 438637, 438638, 438648, 438653, 438656, 438672, 438685, 438687, 438902, H01L 214763

Patent

active

061001848

ABSTRACT:
A technique for fabricating a dual damascene interconnect structure using a low dielectric constant material as a dielectric layer or layers. A low dielectric constant (low-.di-elect cons.) dielectric material is used to form an inter-level dielectric (ILD) layer between metallization layers and in which via and trench openings are formed in the low-.di-elect cons. ILD. The dual damascene technique allows for both the via and trench openings to be filled at the same time.

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Pending Patent Application titled, "Use of Cobalt Tungsten Phosphide as a Barrier Material for Copper Metallization", Serial No. 08/754,600, filed Nov. 20, 1996.

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