Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Patent
1996-12-31
1999-09-28
Niebling, John F.
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
438591, 438301, 438299, H01L 213205
Patent
active
059603020
ABSTRACT:
A composite 3-layer gate dielectric is disclosed. The upper and lower layers have a concentration of nitrogen atoms, while the middle layer has very few nitrogen atoms. The presence of the nitrogen atoms in the top sublayers provides resistance to boron diffusion from the top conductive layer and plasma damage during polysilicon gate stack formation and the presence of nitrogen in the bottom sublayer near the silicon-dielectric interface improves wearout, endurance, resistance to current stress and electron traps.
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Ma Yi
Roy Pradip Kumar
Wu Kevin Yun-kang
Gurley Lynne A.
Lucent Technologies - Inc.
Niebling John F.
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