Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-11-22
2005-11-22
Garbowski, Leigh M. (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C706S013000, C706S921000, C703S013000
Reexamination Certificate
active
06968517
ABSTRACT:
A method of interactively determining at least one optimized design candidate using an optimizer, the optimizer having a generation algorithm and an objective function, the optimized design candidate satisfying a design problem definition, comprises generating design candidates based on the generation algorithm. The generated design candidates are added to a current set of design candidates to form a new set of design candidates. The design candidates are evaluated based on the objective function so that design candidates can be selected for inclusion in a preferred set of design candidates. The current state of the optimizer is presented to a designer for interactive examination and input is received from the designer for updating the current state of the optimizer. These steps are repeated until a stopping criterion is satisfied.
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Bever Hoffman & Harms LLP
Garbowski Leigh M.
Kubodera John M.
Synopsys Inc.
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