Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1999-02-25
2000-03-21
Nelms, David
Static information storage and retrieval
Read/write circuit
Bad bit
371 30, 371 402, 371 4011, 371 4018, G11C 700
Patent
active
060410019
ABSTRACT:
A method for increasing the data reliability of a flash memory device without compromising compatibility with existing memory products or an existing memory format makes only minor modifications to the flash memory device. Inside the flash memory device which supports a low power Error Correcting Code known as Hamming Code, the flash memory cells are divided into groups called blocks. Each block is further divided into units called sectors. Each sector is partioned into well defined areas of bits including: SCRATCH DATA, DATA STATUS, and BLOCK STATUS. According to the method, the bits in DATA STATUS and BLOCK STATUS are modified within the specifications of the existing memory format so they can serve as indicators of the increased data reliability capacity of the flash memory device but continue to carry out the function allocated by the existing memory format. Additionally, the SCRATCH DATA is converted into a repository for the data reliability bits for a high power Error Correcting Code (HP ECC). Finally, a newly-designed controller is utilized to perform the Hamming Code or the HP ECC on the data bits being programmed into or read from the flash memory device. The DATA STATUS and the BLOCK STATUS are decoded to determine which ECC to perform on the data bits.
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Lexar Media, Inc.
Nelms David
Nguyen Hien
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