Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Patent
1996-12-12
1998-06-23
Niebling, John
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
438655, 438656, 438908, 438952, 20419217, H01L 2128
Patent
active
057705151
ABSTRACT:
The present invention relates to a method of a sequencial WSi/.alpha.-Si sputtering process, more particularly to a method of in-situ wafer cooling for a sequencial WSi/.alpha.-Si sputtering process. A sputtering process of WSi and a sputtering process of .alpha.-Si are finished in a multi-chamber sputtering apparatus according to the invention; meanwhile, a wafer is cooled down by bolwing of inert gas before a process of sputtering .alpha.-Si starts. Thus, compared to traditional art of finishing WSi/.alpha.-Si sputtering in two apparatus, partial time of vacuuming and venting required in a sputtering process is saved according to the invention, thereby, shortening the production cycle time, reducing the possibility of wafer contamination, and suppressing the fabricating cost.
REFERENCES:
patent: 5332692 (1994-07-01), Saitoh et al.
patent: 5597458 (1997-01-01), Sanchez, Jr. et al.
Huang Elvis
Meng Hsien-Liang
Shiue Yeong Rvey
Wang Pei-Jan
Bilodean Thomas G.
Mosel Vitelic Incorporated
Niebling John
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