Method of improving the conductivity of transparent...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S030000, C438S678000

Reexamination Certificate

active

06750131

ABSTRACT:

This invention relates to a method of improving the electrical conductivity of transparent conducting lines carried on a substrate. In particular the invention is concerned with increasing the conductivity of addressing lines comprising transparent conducting material in pixellated devices such as active matrix liquid crystal displays. The invention also relates to the transistor substrate, known as the active plate, used in the manufacture of such displays.
An active matrix liquid crystal display (AMLCD) typically comprises an active plate and a passive plate between which liquid crystal material is sandwiched. The active plate comprises an array of transistor switching devices, typically with one transistor associated with each pixel of the display. Each pixel also has a pixel electrode on the active plate to which a signal is applied for controlling the display output of the individual pixel. Liquid crystal displays may be arranged as transmissive or reflective devices.
FIG. 1
shows the electrical components which make up the pixels of one known example of active plate of an AMLCD. The pixels are arranged in rows and columns. The row address conductor
10
of a pixel is connected to the gate of the TFT
12
, and the column address conductor
14
is coupled to the source. The liquid crystal material provided over a pixel electrode of the pixel effectively defines a liquid crystal cell
16
which is connected between the drain of the transistor
12
and a common ground plane
18
. An optional pixel storage capacitor
20
is connected between the drain of the transistor
12
and the row conductor
10
associated with an adjacent row of pixels.
For transmissive displays, a large area of the active plate is at least partially transparent, and this is required because the display is typically illuminated by a back light. In conventional display devices, the pixel electrode must be transparent, whereas row and column conductors are formed as metallic opaque lines. Metallic layers, such as chromium, molybdenum, aluminium, alloys or multilayer structures, are used for the row and column conductors because of the high conductivity, which improves the device performance. The conductivity of the lines (usually the column lines) to which the pixel drive signals are applied is particularly important in large displays, because a sizeable voltage drop occurs over the length of the line, making it impossible to drive uniformly all pixels along the line (column).
A problem with the use of metallic column conductors is that separate deposition and lithographic procedures are required to form the column conductors and the pixel electrodes. The pixel electrodes must be transparent, and are typically formed from a transparent conductive oxide film. It is well known that the lithography steps in the manufacturing process are a major contributing factor to the expense of the manufacturing process. Each lithographic step can be considered to reduce the yield of the process, as well as increasing the cost.
A conventional manufacturing process for the active plate of an LCD is a five mask process. With reference to the bottom gate TFT LCD active plate shown in
FIG. 2
, the process steps, each requiring a separate mask definition, are:
(i) defining the gate
22
(which is part of the row conductor) over the substrate
21
;
(ii) defining the amorphous silicon island (which overlies a gate dielectric
23
that covers the entire structure), comprising a lower intrinsic layer
24
and an upper doped contact layer
26
;
(iii) defining the metallic source
28
, drain
30
and column electrode
32
;
(iv) defining a contact hole
34
in a passivation layer
36
which covers the entire substrate; and
(v) defining the transparent pixel electrode
38
which contacts the drain
30
through the hole
34
.
The capacitor shown in
FIG. 1
may simply be formed from the gate dielectric by providing an area of overlap of one pixel electrode with a portion of the row/gate conductor of the adjacent row.
There have been various proposals to reduce the number of lithography steps, and thereby the mask count, of the manufacture process in order to reduce cost and increase yield.
For example, it has been proposed to form the column conductors from the same transparent conductive oxide film as the pixel electrode, so that these components of the pixel structure can be deposited and patterned together. Additional measures can result in a two mask process, and this is explained with reference to the bottom gate TFT LCD active plate shown in FIG.
3
. The process steps, each requiring a separate mask definition, are:
(i) defining the gate
22
(and row conductors); and
(ii) defining the transparent column conductor
32
(which also forms the TFT source
28
) and the pixel electrode
38
(which also forms the TFT drain
30
).
The definition of the semiconductor island
24
,
26
can be achieved by a self-aligned process using the gate
22
, for example by using light exposure through the substrate. Of course, the semiconductor could equally be formed with a third mask step (between steps (i) and (ii) above). In the periphery of the array, the gate dielectric
23
is etched away using a low-precision stage, to allow contact to the gate lines at the periphery of the display.
In this structure, the high resistivity of the transparent conductive oxide thin film used for the column lines prevents the use of the structure in large (TV-sized) displays or in higher resolution displays, for example above VGA.
For this reason, there are further proposals to treat the column conductor area of the layer to increase the conductivity, whilst not affecting the transparency of the pixel electrode. One possibility would be to electroplate the top of the conducting lines with a metal but this technique has been found to have problems as, due to the resistive nature of the lines being plated, wide variations in the plating thickness over the length of the line tend to occur. Such thickness variations translate to variations in the LC cell gap which is highly undesirable. The article “Conductivity Enhancement of Transparent Electrode by Side-Wall Copper Electroplating”, J. Liu et al, SID 93 Digest, page 554 discloses a method of enhancing the conductivity by electroplating a copper bus to the side of the metal oxide column line. The process involves an incomplete etching process to leave metal oxide residues, which act as seeds for the copper growth. The process is, though, both complicated and difficult to control. In addition, the copper bus will surround the source and drain electrodes, and there is a risk of shorts between the source and drain resulting from fast lateral copper growth when forming the bus. The copper bus around the source and drain electrodes also influences the channel length of the TFT and therefore makes the TFT characteristics unpredictable.
WO 99/59024 discloses a method for enhancing the conductivity of a transparent electrode by providing patterned metallic layers adjacent to the transparent electrodes.
There is still a need for a simple and reliable process for increasing the conductivity of thin film lines of transparent metal oxide layer, such as ITO, without increasing dramatically the complexity of the process. Such a process will find application in active matrix LCD manufacture, but will also be useful for other technologies where mask count reduction could be achieved if a transparent conductive layer could be made to be more conductive at least in certain regions without losing the transparency in others. This may be of benefit for polymer LEDs and large area image sensors.
According to a first aspect of the invention, there is provided a method of improving the electrical conductivity of lines comprising transparent conducting material carried on a substrate, comprising the step of forming the lines of transparent conducting material on the substrate and providing on the upper surface of each of the lines a covering layer extending from an end part of the line and partially covering the upper surface of the l

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