Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2007-06-08
2010-12-28
Shah, Sanjiv (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S159000
Reexamination Certificate
active
07861035
ABSTRACT:
A method of improving the Input/Output (I/O) performance of a Redundant Array of Independent Disks (RAID) system using a Matrix Stripe Cache (MSC). The method includes a first step of generating a rxw matrix, that is, a read and write matrix, present before row combination, through a unit MSC that will perform writing on a disk, a second step of generating a rxw matrix, that is, a final read and write matrix, from the rxw matrix present before row combination, which is generated at the first step, through row combination, and a third step of performing reading based on the row-combined rxw matrix generated at the second step, performing an XOR operation on the row-combined rxw matrix on a row basis, and performing writing on the row-combined rxw matrix on a column basis.
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Baek Sung Hoon
Park Kyu Ho
Bachman & LaPointe P.C.
Chappell Daniel
Korea Advanced Institute of Science and Technology
Shah Sanjiv
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