Method of improving flash memory performance

Details Method of improving flash memory performance Method of improving flash memory performance

2006-12-19

2006-12-19

Nhu, David (Department: 2818)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Implanting to form insulator

C438S257000, C438S238000, C438S381000, C257SE21008, C257S645000, C257S694000

Reexamination Certificate

active

07151042

ABSTRACT:
A method of improving flash memory performance. The method includes: providing a substrate having a gate structure thereon, the gate structure having a gate dielectric layer, a first polysilicon layer, an interploy dielectric layer, and a second polysilicon layer; then, depositing an gate insulating layer to enclose the gate structure, for forming side wall spacers; next, performing a first anneal on the substrate and the enclosed gate structure; then, performing a cell reoxidation on the substrate and the enclosed gate structure by dilute oxidation process using mixed gas comprising oxygen O2 and nitrogen N2. The invention reduces encroachment issues in the interpoly dielectric layer and the tunnel oxide and improves gate coupling ratio (GCR).

REFERENCES:
patent: 5123994 (1992-06-01), Paulsen et al.
patent: 5656516 (1997-08-01), Suzuki
patent: 6348380 (2002-02-01), Weimer et al.
patent: 6624023 (2003-09-01), Han et al.

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