Method of improving device resistance

Details Method of improving device resistance Method of improving device resistance

2005-02-01

2005-02-01

Smith, Matthew (Department: 2825)

Semiconductor device manufacturing: process

Introduction of conductivity modifying dopant into...

Ion implantation of dopant into semiconductor region

C438S308000, C438S369000, C438S373000, C438S473000, C438S506000, C438S480000, C438S510000, C438S519000, C438S526000, C257S390000

Reexamination Certificate

active

06849526

ABSTRACT:
A buried bit line and a fabrication method thereof, wherein the device includes a substrate, a shallow doped region disposed in the substrate, a deep doped region disposed in the substrate below a part of the shallow doped region, wherein the shallow doped region and the deep dope region together form a bit line of the memory device.

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