Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1997-04-02
1998-11-10
Treat, William M.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711125, 395392, G06F 938
Patent
active
058359494
ABSTRACT:
A system and method of readily identifying and handling self-modifying variable length instructions in a pipelined processor is disclosed employing index tags associated with each stage of the execution pipeline wherein the index tags identify the cache line numbers in the instruction cache from which the instructions originate.
REFERENCES:
patent: 4701844 (1987-10-01), Thompson et al.
patent: 4713755 (1987-12-01), Worley, Jr. et al.
patent: 5136696 (1992-08-01), Beckwith et al.
patent: 5170476 (1992-12-01), Laakso et al.
patent: 5249284 (1993-09-01), Kass et al.
patent: 5423014 (1995-06-01), Hinton et al.
patent: 5467459 (1995-11-01), Alexander et al.
patent: 5471598 (1995-11-01), Quattromani et al.
patent: 5535360 (1996-07-01), Cassetti
patent: 5682492 (1997-10-01), McFarland et al.
patent: 5692167 (1997-11-01), Grochowski et al.
patent: 5706466 (1998-01-01), Dockser
patent: 5721855 (1998-02-01), Hinton et al.
patent: 5742791 (1998-04-01), Mahalingaiah et al.
Garibay, Jr. Raul A.
Hervin Mark W.
McMahan Steven C.
Quattromani Marc A.
Maxin John L.
National Semiconductor Corporation
Treat William M.
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