Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing
Reexamination Certificate
2011-05-10
2011-05-10
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Physical design processing
Reexamination Certificate
active
07941776
ABSTRACT:
A closed-loop IC design optimization process by automatically or manually creating design-specific cells with desired characteristics (e.g., performance, area, power, noise, etc.), which will be then implemented as a standard cell (also known hereafter as metacell), from a set of post-layout patterns. A post-layout pattern represents a part or whole of a standard cell and contains information regarding the pattern including, but not limited to, layout, timing, area, power and noise. As the metacells are created from post-layout patterns, the inaccuracies of prior dynamic library techniques are easily avoided. Such metacells, being design-specific, are optimized to satisfy the constraints imposed by the design context, thus bringing the powerful design-specific customization to standard cell-based design methodology.
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Boppana Vamsi
Chavda Pramit Anikumar
Kojima Yoshihisa
Kumthekar Balakrishna
Majumder Purnabha
Bowers Brandon W
Chiang Jack
Ohlandt, Greeley, Ruggiero and Perle, L.L.P.
Open-Silicon Inc.
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