Method of IC design optimization via creation of...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing

Reexamination Certificate

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Reexamination Certificate

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07941776

ABSTRACT:
A closed-loop IC design optimization process by automatically or manually creating design-specific cells with desired characteristics (e.g., performance, area, power, noise, etc.), which will be then implemented as a standard cell (also known hereafter as metacell), from a set of post-layout patterns. A post-layout pattern represents a part or whole of a standard cell and contains information regarding the pattern including, but not limited to, layout, timing, area, power and noise. As the metacells are created from post-layout patterns, the inaccuracies of prior dynamic library techniques are easily avoided. Such metacells, being design-specific, are optimized to satisfy the constraints imposed by the design context, thus bringing the powerful design-specific customization to standard cell-based design methodology.

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patent: 6496965 (2002-12-01), van Ginneken et al.
patent: 6543039 (2003-04-01), Watanabe
patent: 7003738 (2006-02-01), Bhattacharya et al.
Bhattacharya, D. et al., “Automated Flex-Cell Based Design Beyond Standard-Cell Based Optimization and Synthesis,” Zenasis Technologies Inc., Campbell, CA., pp. 1-29.

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