Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
2000-01-31
2002-12-31
Sherry, Michael (Department: 2829)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
C438S760000, C438S778000
Reexamination Certificate
active
06500771
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to fabrication of semiconductor devices and more particularly to the fabrication of flowable boron-contained silicon glass films by using a High Density Plasma Chemical Vapor Deposition (HDP-CVD) technique with gas mixtures containing silane or its derivatives, necessary doping precursors, and oxygen.
2. Description of the Prior Art
In the fabrication of devices such as semiconductor devices, a variety of material layers are sequentially formed and processed on the substrate. For the purpose of this disclosure, the substrate includes a bulk material such as semiconductor, e.g., silicon, body, and if present, various regions of materials such as dielectric materials, conducting materials, metallic materials, and/or semiconductor materials. One of the material regions utilized in this fabrication procedure includes silicon oxide based materials, i.e., materials generally represented by the common formula SiO
n
, where n=~2, including doped silicon oxide films, containing an additional doping element such as boron, phosphorus, and their mixtures, as well as fluorine, with total dopant content depending on the purpose of film application in the device. Below the common term “silicate glass film” is used to characterize silicate glass films.
In ULSI device technology, thin films, including silicon dioxide based films, are created on the substrates using a Chemical Vapor Deposition (CVD) technique that assumes a deposition of the solid state material (glass) on the hot substrate from the gas mixture of precursors and oxidizer. It is realized at different conditions, basically at atmospheric pressure (APCVD), low pressure (LPCVD), subatmospheric pressure (SACVD) reduced pressure, and with plasma excitation of gas mixtures (PECVD). A variety of silicon compounds and doping precursors have been used for film deposition. However, most common compounds are hydrides such as silane, fluorinated silane derivatives, phosphine, diborane, tetraethylortosilicate (TEOS), organic ethers of boric and phosphoric acids such as methylphosphates, ethylborates, etc. Oxygen has been commonly used as an oxidizer until recently when its mixture with ozone has been found to improve deposition process characteristics. Normally, film deposition during this process takes place with a constant deposition rate in the range of 0.1-10 KÅ per minute depending on the method used and its particular conditions.
A silicate glass film is often deposited on a substrate
101
(
FIG. 1
) having a plurality of steps, e.g., conducting steps. A feature of CVD processes is a non-conformal step coverage of growing film
103
on the step
102
on the device substrate
101
that schematically shown in
FIG. 1
, namely the film thickness on the top of structure is always higher as compared to the bottom and side wall thickness. Step coverage is normally expressed as a ratio of film thickness on the structure side wall “S” to the thickness on the structure top “T”, as shown in FIG.
1
. This ratio is different for different deposition processes as well as for current structures and is in the range of 15-90%.
Among other techniques used in semiconductor processing, silicon oxide based films (including fluorosilicate and phosphosilicate glass films) have been deposited during the last few years using a modified Plasma Enhanced Chemical Vapor Deposition (PECVD) called a High Density Plasma Chemical Vapor Deposition (HDP-CVD) technique. This technique assumes simultaneous deposition and sputtering of depositing films in order to improve gap-fill capability, as shown schematically in FIG.
2
.
FIG. 2
shows steps
102
formed on a semiconductor substrate
101
. The silicon oxide or silicon glass film
103
is deposited over the steps
102
. Material species are shown
104
on the surface of the film. Ionized Ar molecules
105
bombard the surface of the film resulting in sputtered and redeposited material
106
and vaporized material species
107
. The method of chemical vapor deposition of silicon oxide and doped silicon glass films at High Density Plasma conditions (HDP-CVD) with silane-oxygen based gas mixtures is used in semiconductor manufacturing mostly for sub-quarter micron Ultra Large Scale Integrated (ULSI) circuit device applications. This method is used for deposition of silicon oxide, or frequently known as undoped silicon glass (USG), phosphosilicate glass (PSG), fluorosilicate glass (FSG), i.e. films which typically should not be subjected to thermal treatment at elevated temperatures. In the case of doped films, the dopant precursor, such as phosphine PH
3
, for example, is added to the silane-oxygen mixture. Also, organic/inorganic silane derivatives, such as tetrafluorosilane SiF
4
or difluorosilane SiH
2
F
2
are used either alone or in a mixture with silane.
Silicate glass regions are utilized as insulating/passivating layers, as an electrical insulation between conducting layers, e.g., polysilicon or metal layers. Films of undoped silicon oxide are used also as a liner or as a cap layer either under or on the doped silicon oxide layers, respectively, to limit unacceptable dopant migration during subsequent processing. Tightening of device design rules leads to more complicated device structures with small gaps
201
(
FIG. 3A
) between neighboring elements. As a result of CVD non-conformal film growth on the top, side walls and bottom of such device structures that are shown schematically as a thinner film on the structure side wall
202
as compared to that thickness on the top of structure (this is due to the deposition kinetic features and diffusion limitation in small gaps), voids
203
(
FIG. 3B
) form inside structure elements. These voids have normally a keyhole shape that is valid for CVD methods for all current types of films. The voids are more or less pronounced depending on particular deposition conditions.
The reason for void formation is a common non-conformal glass film growth during film deposition that is shown schematically in
FIG. 4A-C
for different deposition techniques currently used in device manufacturing, such as LPCVD (FIG.
4
A), APCVD (FIG.
4
B), and PECVD (FIG.
4
C). As can be seen in
FIG. 4A
, reduced pressure provides normally better step coverage, however, it normally means a lower deposition rate. Atmospheric pressure at certain conditions can cause even imperfection of film integrity in the bottom corners of structures
205
, as shown in FIG.
4
B. The last technique, being a part of HDP-CVD technique, provides the worst known case of step coverage, mostly below 50% even for single device steps, as well as imperfection of film integrity in the bottom corners
205
and the very specific “bread-loaf” shape of the growing film
206
, as shown in FIG.
4
C.
Among the CVD.process features, void size is strongly dependent on the structure parameters, such as structure shape, size of gaps between device elements (G) and structure height (H) which are normally combined to express structure complexity as an aspect ratio (AR=H/G)), as shown as an example in FIG.
4
A. To characterize an ability of film to fill narrow gaps between device elements, a term “gap-fill capability” is normally used and structures without any imperfection between device elements seen in cross-section of real structures using scanning electron microscopy techniques, are normally called “void-free”. The void problem is significantly affected by structure shape being much more pronounced for structures with re-entrant gap shape, as shown schematically in terms of step coverage in
FIG. 5
followed by the structure with vertical side walls. The best void-free gap-fill is normally achieved with structure tapering, however this approach is not applicable for all devices.
FIG. 5
shows a re-entrant gap shape
120
, a vertical gap shape
122
, and a tapered gap shape
124
.
The problem of film integrity and void formation at HDP-CVD processes (below the common term “voids” is used for both types of film structu
Cuthbertson Alan
Sudijono John Leonard
Vassiliev Vladislav
Chartered Semiconductor Manufacturing Ltd.
Geyer Scott
Pike Rosemary L. S.
Saile George O.
Sherry Michael
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