Method of growing high breakdown voltage allnas layers in InP de

Details Method of growing high breakdown voltage allnas layers in InP de Method of growing high breakdown voltage allnas layers in InP de

1995-04-21

1997-02-18

Breneman, R. Bruce

Single-crystal, oriented-crystal, and epitaxy growth processes;

Forming from vapor or gaseous state

With decomposition of a precursor

117103, 117106, 117108, 117953, 437133, H01L 2120

Patent

active

056037651

ABSTRACT:
High breakdown voltages for AlInAs layers in InP-based devices, such as a gate layer in an InP HEMT or a collector layer in a heterojunction bipolar transistor, are achieved by growing the AlInAs layer by MBE at a substrate temperature about 70.degree.-125.degree. C. below the temperature at which a 2.times.4 reflective high energy diffraction pattern is observed. This corresponds to a growth temperature range of about 415.degree.-470.degree. C. for a 540.degree. 2.times.4 reconstruction temperature. Preferred growth temperatures within these ranges are 80.degree. C. below the 2.times.4 reconstruction temperature, or about 460.degree. C. Higher breakdown voltages are obtained than when the AlInAs layer is grown at either higher or lower temperatures.

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