Method of growing high breakdown voltage allnas layers in InP de

Single-crystal – oriented-crystal – and epitaxy growth processes; – Forming from vapor or gaseous state – With decomposition of a precursor

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

117103, 117106, 117108, 117953, 437133, H01L 2120

Patent

active

056037651

ABSTRACT:
High breakdown voltages for AlInAs layers in InP-based devices, such as a gate layer in an InP HEMT or a collector layer in a heterojunction bipolar transistor, are achieved by growing the AlInAs layer by MBE at a substrate temperature about 70.degree.-125.degree. C. below the temperature at which a 2.times.4 reflective high energy diffraction pattern is observed. This corresponds to a growth temperature range of about 415.degree.-470.degree. C. for a 540.degree. 2.times.4 reconstruction temperature. Preferred growth temperatures within these ranges are 80.degree. C. below the 2.times.4 reconstruction temperature, or about 460.degree. C. Higher breakdown voltages are obtained than when the AlInAs layer is grown at either higher or lower temperatures.

REFERENCES:
patent: 5023675 (1991-06-01), Ishikawa
patent: 5084743 (1992-01-01), Mishra et al.
patent: 5164800 (1992-11-01), Nakajima
patent: 5270798 (1993-12-01), Pao et al.
patent: 5322808 (1994-06-01), Brown et al.
Korona et al., "Optical and electrical measurements of low-temperature InAlAs," Acta Phys. Pol. A (Poland), vol. 82, No. 5, pp. 825-828, Nov. 1992 (Abstract only).
R. A. Metzger et al., "Growth and characterization of low temperature AllnAs," Journal of Crystal Growth 111 (1991), pp. 445-449.
R. A. Metzger et al., "Control of Be diffusion in AllnAs/GatnAs heterostructure bipolar transistors through use of low-temperature GalnAs," Journal of Vacuum Science and Technology, B 10(2), Mar./Apr. 1992, pp. 859-862.
Matloubian et al., "High Power and High Efficiency AllnAs/GalnAs on InP HEMTs", IEEE MTT-S Int. Microwave Symp. Dig., 1991, pp. 721-724.
R. Averbeck et al., "Oxide Desorption from InP Under Stabilizing Pressures of P.sub.2 or As.sub.4 ", Appl. Phys. Lett. 59(14) 30 Sep. 1991, pp. 1732-1734.
E. Bauer, "Reflection Electron Diffraction", Chapter 15, pp. 501-542, Techniques for the Direct Observation of Structure and Imperfections Part II, Interscience Publishers, 1969.
Georgakilas et al., "A Comprehensive Optimization of InAlAs Molecular Beam Epitaxy for InGaAs/InAlAs HEMT Technology", Journal of the Eectrochemical Society, vol. 140, No. 5, May 1993, pp. 1503-1509.
Korona, et al, "Optical and Electrical Measurements of Low Temperature InAlAs" Acta Phys. Pol. A (Poland), vol. 82, No. 5, pp. 826-828, Nov., 1992 (whole article).

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method of growing high breakdown voltage allnas layers in InP de does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of growing high breakdown voltage allnas layers in InP de, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of growing high breakdown voltage allnas layers in InP de will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1599720

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.