Method of generating address of coefficient memory in OFDM adapt

Details Method of generating address of coefficient memory in OFDM adapt Method of generating address of coefficient memory in OFDM adapt

1998-06-26

2000-08-01

Lane, Jack A.

Electrical computers and digital processing systems: memory

Address formation

Combining two or more values to create address

375232, H03H 730, H03H 740

Patent

active

06098161&

ABSTRACT:
A method and an apparatus for generating address of a coefficient memory in an OFDM adaptive channel equalizer are disclosed. The address generating apparatus comprises a signal generator for generating a symbol identification signal according to modulo-(Y+1) operation on symbol numbers within one OFDM transmission frame; a first pulse generator for generating a first pulse signal synchronized with a sample clock according to the location of the pilot signal within each symbol respective to the symbol identification signal; a write address generator for generating a write address of the coefficient memory by the first pulse signal and the symbol identification signal; a second pulse generator for generating a second pulse signal by frequency-dividing the sample clock by Y; and a read address generator for generating a read address of the coefficient memory by the second pulse signal. Therefore, the address and the enable signal for the coefficient memory can be simply generated by using the sequential circuit such as the counter, thereby accessing efficiently the updated coefficient value according to the pilot insertion principle.

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