Method of generating a geometrical rule for germanium...

Details Method of generating a geometrical rule for germanium... Method of generating a geometrical rule for germanium...

2008-03-04

2008-03-04

Chiang, Jack (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

07340709

ABSTRACT:
In a computer-assisted product development system comprising a processor and a storage, a software-implemented method for asserting design rules related to the manufacturability of optoelectronic devices comprising germanium. Design rules may be established for devices comprising germanium and/or germanium and silicon heterostructures, thereby enabling and/or enhancing the manufacturability of photodetectors comprising germanium in integrated CMOS devices according to standard and/or custom CMOS processes. In some cases, design rules may be established to define allowable ranges for geometrical parameters related to the shapes defined in one or more mask layers; in some cases, design rules may be established to define allowable ranges for geometrical parameters related to the dimensions of actually constructed devices. In some cases, design rules may be established based on processing constraints or yield or manufacturability considerations; in some cases, design rules may be used to help avoid physical configurations which may lead to inefficient or broken devices.

REFERENCES:
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patent: 6887773 (2005-05-01), Gunn et al.
patent: 7251799 (2007-07-01), Nogami et al.
Koing et al., Design Rule for n-Type SiGe HETERO FETs, 1997, Solid State Electronics, vol. 41, pp. 1541-1547.

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