Method of fusion for heteroepitaxial layers and overgrowth...

Semiconductor device manufacturing: process – Bonding of plural semiconductor substrates – Thinning of semiconductor substrate

Reexamination Certificate

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Reexamination Certificate

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06534385

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to methods of fusion for heteroepitaxial layers and overgrowth thereon. More particularly, the present invention relates to methods of forming a high quality epitaxial layer on the heteroepitaxy with materials having different lattice constants and heteroepitaxy so fabricated.
2. Description of the Prior Art
Generally, it is almost impossible to form a high quality crystal layer with materials having different lattice constants. Forming a thin film on a substrate by using another material having a lattice constant different from that of the substrate causes defects such as threading dislocation inside the thin film, thereby resulting in significant deterioration of crystal and optical properties of the so-formed substrate. For example, it is almost impossible for GaAs having different lattice constants to be grown on a Si substrate or an InP substrate without any defects. However, if defect-free growth can be realized, high integration of optoelectronic devices on a substrate and of various communication and electronic devices can be achieved. Further, innovative development of an optical device and an electronic device will be possible.
There are some prior art methods for heteroepitaxial growth that claim to suppress dislocation growth. Examples of such methods are a two-step growth method, a method introducing a deformation layer, wafer fusion, etc. Wafer fusion, particularly, has many advantages in that it can be applied to various material systems. However, it is difficult for the interface between two substrates to be free of defects due to the effects of the two substrates. As a result, a good quality hetero-junction cannot be achieved.
Recently, devices utilizing quantum structures have been drawing a significant amount of attention. The innovative development of semiconductor fabrication technology in this century provides various technical advancements to humankind. In the 21
st
century, society will be oriented toward an information super-highway and the main goal of research efforts will be directed toward semiconductor nanofabrication technology, which will make it possible to fabricate highly integrated circuitry of two-dimensional plane and one-dimensional wires. The future of quantum nanostructure devices will strongly rest upon the success of this technology. The quantum well structure was realized experimentally by using a hetero-junction of two types of semiconductor material with different band gaps in the early 1970s. In the 1980s, experiments conducted on quantum wires in which the electrons have one degree of freedom were successful. In the mid-1980s, the fabrication of the quantum dot structure was accomplished, whereby electrons having zero degree of freedom could be investigated. As an application of the quantum process, new conceptive devices such as HEMT (high electron mobility transistor) have been created. Further, novel quantum devices, such as laser diodes, optical couplers, etc., are already commercialized and utilized in CDs, laser printers, etc. In addition, a single electron transistor utilizing a quantum structure is intensively being studied as a possible core device for the future.
In order to form such quantum structures, good quality heteroepitaxial growth must be achieved. However, a hetero-junction of two semiconductor materials with different lattice constants has the problems mentioned above, and nothing has been published on quantum structure-related technology for heteroepitaxy.
3. SUMMARY OF THE INVENTION
The object of the present invention is to provide, without significant defects, methods capable of accomplishing good quality epitaxial growth after the junction of two semiconductor materials having different lattice constants.
The other object of the present invention is to form a good quality quantum well structure by joining said two semiconductor materials.


REFERENCES:
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patent: 5827754 (1998-10-01), Min et al.
patent: 5904492 (1999-05-01), Min et al.
patent: 5985687 (1999-11-01), Bowers et al.
patent: 6205165 (2001-03-01), Yamamoto et al.
patent: 6285698 (2001-09-01), Romano et al.
patent: 6323108 (2001-11-01), Kub et al.
Journal of Crystal Growth, ScienceDirect, vol. 220, Issues 1-2, pp. 1-4.
Hwang et al. Growth Behavior of GaAs/A1GaAs Multi-Layers Grown on U-Grooved GaAs Fusion Layer on InP Substrate;Journal of Crystal Growth, vol. 220 (2000), pp. 56-61.

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