Method of forming ultra-shallow junctions in a semiconductor waf

Details Method of forming ultra-shallow junctions in a semiconductor waf Method of forming ultra-shallow junctions in a semiconductor waf

1998-11-04

2000-12-26

Bowers, Charles

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438301, 438303, 438683, 438655, 438664, 438649, 438592, H01L 2144

Patent

active

061659037

ABSTRACT:
A method for forming ultra shallow junctions in a semiconductor wafer with reduced silicon consumption during salicidation supplies additional silicon during the salicidation process. After the gate and source/drain junctions are formed in a semiconductor device, high resistivity metal silicide regions are formed on the gate and source/drain junctions. Silicon is then deposited in a layer on the high resistivity metal silicide regions. An annealing step is then performed to form low resistivity metal silicide regions on the gate and source/drain junctions. The deposited silicon is a source of silicon that is employed as a diffusion species during the transformation of the high resistivity metal silicide (such as CoSi) to a low resistivity metal silicide (such as CoSi.sub.2). Since the additional silicon provided in the deposited layer is consumed, there is reduced consumption of the silicon from the ultra-shallow junctions, thereby preventing the bottom of the silicide regions from reaching the bottom of the source/drain junctions.

REFERENCES:
patent: 5972785 (1999-10-01), Shishiguchi et al.
patent: 5994191 (1999-11-01), Xiang et al.
patent: 6015752 (2000-01-01), Xiang et al.
H. Jiang et al., "Ultra Shallow Junction Formation Using Diffusion From Silicides", J. Electrochem, Soc., vol. 139, No. 1, Jan. 1992, pp. 196-218.
Materials and Bulk Processes, "Doping Technologies", The National Technology Roadmap for Semiconductors, 1994, pp. 118-121.

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