Method of forming tungsten interconnect and vias without...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S725000, C430S329000, C216S067000

Reexamination Certificate

active

06410417

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to an improved method of metal interconnect etching, and more particularly, to a method of reducing tungsten loss due to wet stripping after metal interconnect etching.
BACKGROUND OF THE INVENTION
The process of forming a metal interconnect layer and the associated conductive via plugs that connect different interconnect layers is an important process in the manufacture of integrated circuits. In this process, via plugs are first formed in the vias formed in an underlying dielectric layer. The dielectric layer is typically an oxide and includes multiple vias that extend from the top of the insulative dielectric layer down to an underlying metal interconnect, landing pad, contact pad, or semiconductor substrate. Typically, the via plugs are formed by depositing a tungsten layer using a chemical vapor deposition process or physical vapor deposition sputtering process. Then, either a metal chemical mechanical polishing (CMP) or an etch back technique is used to remove the tungsten lying outside the vias.
Next, a second metal layer, such as aluminum, is blanket deposited over the dielectric layer and over the via plugs. Once the second metal layer has been blanket deposited over the oxide, a photoresist layer is deposited, patterned, and developed over the second metal layer. The photoresist layer is patterned to reflect the desired metal interconnect pattern. Next, using a plasma etching technique, the metal layer is etched using the patterned photoresist layer as a mask. After the etching of the second metal layer is complete, the photoresist is removed. Although not particularly relevant to the present invention, in manufacturing practice, a thin titanium/titanium nitride layer is typically deposited to act as an adhesion layer between the oxide and the metal layers.
One common method of removing the photoresist is by “ashing.” The ashing is performed in a plasma asher, typically by using an oxygen plasma. However, it has been found that the ashing process often times leaves a polymer residue on the surface of the wafer. Additionally, another side effect of the ashing process by oxygen plasma is an increase in the charge on the wafer. The charge will be typically stored in floating lines.
In order to remove the polymer residue, a wet stripper is used. However, it has been found that the wet stripper, especially when the wet stripper is an alkaline solvent, reacts with the tungsten plugs in the vias. The reaction causes erosion of the tungsten as well as increasing the contact resistance of the tungsten. This phenomena is described in “A New Failure Mechanism by Corrosion of Tungsten in a Tungsten Plug Process” by S. Bothra et al., Technology Department, VLSI Technology Inc. (1998). It can be appreciated that the tungsten in the vias is exposed because of imperfect overlay of the metal interconnect pattern over the vias or design requirements.
Therefore, what is needed is a method of effectively forming a tungsten metal interconnect while protecting the tungsten plugs in the vias from erosion.
SUMMARY OF THE INVENTION
A method of forming a metal interconnect structure and via plugs over a dielectric layer having a plurality of vias formed therein is disclosed. The method comprises the steps of: forming tungsten via plugs in said plurality of vias; depositing a metal layer over said dielectric layer and said plurality of tungsten via plugs; patterning and etching said metal layer using a photoresist layer to form said metal interconnect structure; removing said photoresist layer in an asher using a combination of oxygen plasma and water vapor, said ratio of oxygen plasma and water vapor being less than one; and performing a wet strip on said metal interconnect structure.


REFERENCES:
patent: 4983254 (1991-01-01), Fujimura et al.
patent: 5057187 (1991-10-01), Shinagawa et al.
patent: 5117276 (1992-05-01), Thomas et al.
patent: 5380397 (1995-01-01), Fukuyama
patent: 5397432 (1995-03-01), Konno et al.
patent: 5414221 (1995-05-01), Gardener
patent: 5560803 (1996-10-01), Mihara et al.
patent: 5773201 (1998-06-01), Fujimura et al.
patent: 5776832 (1998-07-01), Hsich et al.
patent: 5946589 (1999-08-01), Ng et al.
Bothra, S. et al., “A New Failure Mechanism by Corrosion of Tungsten in a Tungsten Plug Process,”IEEE Intl. Reliability Physics Symp., pp. 150-156, 1998..

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method of forming tungsten interconnect and vias without... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of forming tungsten interconnect and vias without..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of forming tungsten interconnect and vias without... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2891501

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.