Semiconductor device manufacturing: process – Formation of semiconductive active region on any substrate – Fluid growth from gaseous state combined with preceding...
Reexamination Certificate
1990-05-18
2002-05-14
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
Formation of semiconductive active region on any substrate
Fluid growth from gaseous state combined with preceding...
C438S041000, C438S607000
Reexamination Certificate
active
06387781
ABSTRACT:
ORIGIN OF THE INVENTION
The invention described herein was made in the performance of work under a NASA contract, and is subject to the provisions of Public Law 96-517 (35 USC 202) in which the Contractor has elected not to retain title.
TECHNICAL FIELD
The present invention relates to the fabrication of electronic devices and integrated circuit devices by the deposition of circuit elements on a substrate such as silicon using the techniques of molecular beam epitaxy. More specifically, a new process is disclosed that allows the formation of circuit elements in three dimensions, rather than as planar layers, thus providing an entirely new class of structures.
BACKGROUND OF THE INVENTION
The prior art recognizes molecular beam epitaxy (MBE) as the best process for depositing very thin layers of metal and semiconductor compounds onto substrates such as silicon. The MBE process uses an ultra-high vacuum chamber containing the substrate and one or more evaporation crucibles. The material to be deposited is heated in a crucible until the material vaporizes. Molecules of the vaporized material travel unimpeded through the vacuum in straight lines to the surface of the substrate. Because of their straight flight paths, the molecules are easily collimated into a controllable beam, by suitable apertures, so as to impinge on the substrate at a selected rate and from a selected direction. Shutters may be interposed in the beam to block the beam for periods of time. Varying the heating of the crucible controls the rate of free molecule production.
The substrate is usually heated so that the arriving molecules remain mobile on the surface for a short time. Thus, each molecule has time to locate a preferred site upon which to attach so that a regular crystal growth is facilitated. In this way, very thin layers of single crystal or monocrystalline material may be deposited that are on the order of nanometers thick.
To enhance single crystal growth, the deposited layer should have a natural crystal structure similar in shape and size characteristics to the crystal structure of the substrate so that epitaxial growth takes place. In other words, the regular crystal lattice of the substrate provides a template upon which the arriving atoms of deposited material are organized into a similar, regular, single crystal structure.
Any substrate adaptable to the above outlined principles could profit from the process of this invention. For example, substrates may comprise silicon, germanium, or compound semiconductors such as gallium arsenide, indium arsenide and indium antimonide. However, the discussion herein is oriented to the most common and best understood substrate material which is silicon.
The deposited conductor is usually selected to be chemically compatible with the chosen substrate and may be a metal and semiconductor compound or even a combination of two semiconductors such as silicon and germanium. A conductor for an indium antimonide substrate, for example, might be a compound of nickel and antimony. Once again, however, the discussion herein is focused on metal silicide deposits which are also well known and characterized with respect to their structure and properties.
Metal silicides, combinations of metals such as cobalt, platinum, chromium, nickel, tantalum, or iridium with silicon, are good choices for the deposited layer on silicon substrates since they are chemically compatible with the silicon substrate. To deposit metal silicides, the metal and the silicon are coevaporated in separate crucibles at rates so as to impinge on the silicon substrate in correct stoichiometric ratios to form the desired single crystal compound in a thin layer. For example, cobalt disilicide (CoSi
2
) is a well studied metal silicide conductor that is produced by MBE methods in which cobalt and silicon are coevaporated in a ratio of one cobalt atom for every two silicon atoms.
Prior art MBE methods control the thickness of the deposited layer by the length and rate of deposition. This affects only the dimension perpendicular to the substrate. Lateral dimensions, those parallel to the substrate surface, are controlled by lithographic techniques and limited to relatively large dimensions. The present invention, by contrast, provides a means whereby both vertical and lateral dimensions are controllable so as to permit the creation of a whole new class of three-dimensional MBE deposited devices not heretofore possible.
STATEMENT OF THE PRIOR ART
U.S. Pat. No. 4,171,234 to Negata et al. discloses a process that avoids the use of masks during MBE by forming irregular shapes in the substrate. These shapes are used to shadow an incident molecular beam, at various angles, so as to modify the characteristics of the deposited crystalline layer. The kinds of epitaxial structures that can be created this way are obviously quite limited. Beyond the height of the substrate mesas the deposited layer would revert to a planar layer of no distinction. The instant invention, however can begin with an ordinary planar substrate and develop a wide variety of three dimensional structures of almost any desired configuration.
U.S. Pat. No. 4,099,305 to Cho et al. discloses a process similar to Negata above and subject to the same limitations.
SUMMARY OF THE INVENTION
The present invention contemplates a new MBE type process that produces column like structures that grow epitaxially from the substrate surface in a direction generally perpendicular thereto. The height, width, shape, and spacing of the columns are all selectable by modification of the processing parameters rather than by masking. A large variety of desired three dimensional shapes may be generated to make available an entire new set of electronic devices. Some of these new devices are described, by way of example, in order to emphasize the potential of this inventive technique.
Briefly, the new MBE process involves coevaporating metal and silicon in ratios well removed from stoichiometric with a large excess of silicon. Given the correct growth environment, vertical columns of single crystal metal silicide epitaxially form upward from the silicon substrate surface. The columns are embedded in a surrounding matrix of single crystal silicon. It has been determined that the spacing, thickness, and height of the columns may be chosen by varying the process parameters. In addition, the location and shape of the columns may be selected by seeding the substrate in the places where columns are desired.
The principles of the invention are applicable to many substrate materials such as silicon, germanium, gallium arsenide, indium arsenide, or indium antimonide. For the selected substrate, a chemically compatible conductor is chosen comprising a combination deposit of metal and semiconductor or a combination deposit of two semiconductors, once again using an excess quantity of the semiconductor that forms a matrix on the substrate. Thus, although the conductive structures are described as metal compounds in this specification, for ease of explanation, the word metal is intended to include electrically conductive materials in general, especially semiconductors.
These and many other features and attendant advantages of the invention will become apparent as the invention becomes better understood by reference to the following detailed description when considered in conjunction with the accompanying drawings.
REFERENCES:
patent: 3992233 (1976-11-01), Farrow
patent: 4099305 (1978-07-01), Cho et al.
patent: 4147573 (1979-04-01), Morimoto
patent: 4171234 (1979-10-01), Nagata et al.
patent: 4411728 (1983-10-01), Sakamoto
patent: 4501769 (1985-02-01), Hieber et al.
patent: 4554030 (1985-11-01), Haisma et al.
patent: 4662060 (1987-05-01), Aina et al.
patent: 4707197 (1987-11-01), Hensel et al.
patent: 4758534 (1988-07-01), Derkits, Jr. et al.
patent: 4871691 (1989-10-01), Torres et al.
patent: 4901121 (1990-02-01), Gibson et al.
patent: 4957777 (1990-09-01), Ilderem et al.
Badoz et al., “Selective silicon Epitaxial Growth on a Submicrometer Tungsten Disilicide”, J. Electron. Mater.
Bowers Charles
Christianson Keith
Kusmiss John H.
The United States of America as represented by the Administrator
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