Method of forming thin film interconnection systems

Adhesive bonding and miscellaneous chemical manufacture – Delaminating processes adapted for specified product – Delaminating in preparation for post processing recycling step

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156646, 156656, 156657, 1566591, 204192EC, 204192E, 357 71, 427 90, C23F 102, C03C 1500, C03C 2506

Patent

active

041849094

ABSTRACT:
A method for forming thin film interconnection patterns atop substrates, particularly semiconductor substrates. It features the use of the passivation layer itself, typically glass, as a stable masking material to etch the conductive lines. Conversely, the metal conductor is used as a stable mask in etching the glass to form via holes. The process provides a practical resist system which is compatible with reactive ion etching or other dry etching process.

REFERENCES:
patent: 3914127 (1975-10-01), Buss et al.
patent: 3971684 (1976-07-01), Muto
patent: 3994793 (1976-11-01), Harvilchuck et al.
patent: 4090006 (1978-05-01), Havas et al.
IBM Technical Disclosure Bulletin, vol. 9, No. 9, Feb. 1967, Preferential Ion Etch Technique with Reactive Sputtering by R. Tsui, p. 1070.
IBM Technical Disclosure Bulletin, vol. 16, No. 6, Nov. 1973, Etching of SiO.sub.2 Using Plasma by R. Anderson et al., p. 1892.
IBM Technical Disclosure Bulletin, vol. 19, No. 9, Feb. 1977, Forming Planar Integrated Circuit Metallization, by Metzger et al., pp. 3364-3365.

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