Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2001-10-23
2002-10-22
Tsai, Jey (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S613000, C438S614000
Reexamination Certificate
active
06468893
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of forming solder bumps. More particularly, the invention relates to a method of forming solder bumps that realizes formation of solder bumps with a desired height on electrodes or pads of an object to be connected, such as a substrate, a LSI (Large-Scale Integration) bare chip, and an electronic component, while suppressing or preventing generation of the defect of voids in solder bumps formed.
2. Description of the Related Art
The “flip-chip bonding” method, which is known well, is typically used to interconnect a LSI bare chip (which may be termed a “LSI chip” or “bare chip”, hereinafter) to a mounting substrate. In this method, “solder bumps” (which are typically approximately spherical projections of solder) are formed on the electrodes or bonding pads of a LSI bare chip. Then, the solder bumps are opposed and joined to the corresponding electrodes or pads of a mounting substrate, thereby connecting electrically and mechanically the bumps on the chip to the corresponding electrodes or pads of the substrate. Thus, the bare chip is fixed or mounted on the substrate in its face-down state.
The flip-chip bonding method may be applicable to mounting and connection of other electronic elements and/or components than LSI bare chips. In this case, the solder bumps are formed on the electrodes (i.e., lands) of a mounting board (e.g., a Printed Wiring Board (PWB)) or the terminals or electrodes of an electronic element or component.
Conventionally, various types of method of forming solder bumps have been known, which are divided into several groups corresponding to the technique used therein. For example, one of the groups uses a solder layer formed by a plating or evaporating process of a solder material. Another one of the groups uses the placement of solder balls on the electrodes. Still another one of the groups uses a solder paste layer formed by a printing process. Recently, there is a method using “metal jet”. Solder layers or solder balls, which are formed or placed on the electrodes by one of these methods, are temporarily melted due to heat in a reflowing furnace, forming molten solder pieces on the electrodes. These molten solder pieces are likely to be round or projective due to their surface tension and thus, the molten solder pieces are cooled to solidify naturally as they are. As a result, approximately spherical or projective solder bumps are formed on the electrodes.
These types of method have their own advantages and disadvantages and therefore, it is usual that one of them is selected and used according to the purpose.
From the viewpoint of fabrication cost, it is most preferred to select the type of method using a printed solder paste layer as preliminary solder pieces. This is because the preliminary solder pieces are formed by a screen printing process and thus, the method can be conducted with simple facilities and the fabrication cost can be reduced easily.
However, the type of method using a solder paste layer has a disadvantage that an obtainable height of solder bumps is smaller than the other types. This is due to the fact that the amount of solder to be placed on each electrode or pad has to be limited to a low level through one printing process in order to prevent the defect termed “solder bridge” and “deviation or fluctuation of solder amount”. On the other hand, if the height of solder bumps is insufficient, defective connection of the solder bumps to the corresponding electrodes or pads tends to occur because of the surface irregularity and/or thermal deformation of the substrate. Accordingly, some contrivance is necessary to realize solder bumps with desired, sufficient height without any defects.
The type of method using a solder paste layer has another disadvantage that a defect termed “void” is likely to be formed in solder bumps. This is because a solder paste is mainly made of solder particles and a flux and therefore, it has less wettability to the electrodes or pads than that of the other types of method. If a void occurs in a solder bump, the effective connection area of the bump to the electrode or pad decreases largely and at the same time, stress concentration occurs in the neighborhood of the void. As a result, there arises a serious problem of degradation of mounting or interconnection reliability.
As explained above, with the conventional method of forming solder bumps using screen printing, some measure needs to be taken to form void-free, good-quality solder bumps with a sufficient height while making use of the advantage of low cost. To provide such measure, various improvements have ever been studied and developed for this method.
The Japanese Non-Examined Patent Publication No. 11-40936 published in 1999 discloses an improved method of forming solder bumps. In this method, a patterned solder paste layer is formed on a substrate by printing using a metal mask (i.e., the printing step) and then, the solder paste layer is reflown (i.e., the reflowing step). The printing and reflowing steps are repeated according to the necessity to obtain solder bumps with a desired height. As a result, even if conventional mounting facilities are used, there arises no defects such as “solder bridge” caused by the excessive openings of the mask and/or “solder amount dispersion” caused by bad detachment behavior of the mask from the substrate due to the excessive thickness of the mask. This means that the resultant solder bumps have a desired height and are uniform in size.
In the prior-art method disclosed by the Publication No. 11-40936, if necessary, when the combination of the printing and reflowing steps is repeated, the thickness of the metal mask and/or the diameter and/or shape of the openings of the mask may be changed. Moreover, the composition and/or characteristics of the solder paste used may be varied, and the process condition of the printing or reflowing step may be changed, according to the necessity.
The Japanese Non-Examined Patent Publication No. 11-145176 published in 1999 discloses another improved method of forming solder bumps using screen printing. In this method, a patterned solder paste layer is formed by printing on a substrate using a mask with openings (i.e., the printing step) and then, the solder paste layer is heated and melted temporarily, forming a solder bump layer (the heating step). The combination of the printing and heating steps is defined as a “bump layer formation cycle”. The bump layer formation cycle is repeated as necessary to form solder bumps with a desired height.
In the prior-art method of forming solder bumps disclosed by the Publication No. 11-145176, if necessary, a flattening step of flattening the upper face of the solder bump layer may be added. When the bump layer formation cycle is repeated, the thickness of the mask, the property and/or fluidity of the solder paste used, or the area or size of the openings of the mask may be changed.
The above-described Publication No. 11-145176 further discloses a method of forming preliminary solder pieces. This method is used to form preliminary solder pieces on a mounting substrate on which an object (e.g., a LSI chip) with solder bumps is to be mounted by the flip-chip bonding method. A resist film with openings at the connection points for the solder bumps is formed on the substrate. The preliminary solder pieces are placed at the connection points. In this method, a patterned solder paste layer is formed on the substrate by printing using a mask with openings at the connection points (i.e., the printing step) and then, the solder paste layer is heated and melted temporarily (i.e., the heating step), thereby forming preliminary solder pieces on the pads of the substrate. The openings of the mask used in the printing step are set to be larger in size or area than those of the resist film.
In the prior-art method forming preliminary solder pieces disclosed by the Publication No. 11-145176, the preliminary solder pieces are placed on the pads of the substrate
Gurley Lynne A.
NEC Corporation
Tsai Jey
LandOfFree
Method of forming solder bumps does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of forming solder bumps, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of forming solder bumps will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3000099