Method of forming sidewall capacitance structure

Semiconductor device manufacturing: process – Having magnetic or ferroelectric component

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438254, H01L 218242, H01G 706

Patent

active

060339195

ABSTRACT:
A capacitive structure on an integrated circuit and a method of making the same are disclosed, which is particularly useful in random-access memory devices. Generally, the method of the present invention comprises the steps of forming a substantially vertical temporary support 54 (preferably by forming a cylindrical aperture in an insulating layer) on a semiconductor substrate 10 and forming a substantially vertical dielectric film 32 (preferably a high dielectric constant perovskite-phase dielectric film, and more preferably barium strontium titanate) on temporary support 54. The method further comprises depositing a first conductive (e.g. platinum) electrode 60 on substantially vertical dielectric film 32, and subsequently replacing temporary support 54 with a second conductive (e.g. platinum) electrode 64, such that a thin film capacitor 44 which is substantially vertical with respect to substrate 10 is formed. The entire capacitor is essentially self-aligned, such that some embodiments require only one lithography step to complete the capacitor. Also, an advantage of this method is that a high temperature, high oxygen activity dielectric deposition may be completed prior to formation of either electrode, thus greatly simplifying both electrode structure and processing.

REFERENCES:
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patent: 5498889 (1996-03-01), Hayden
patent: 5561308 (1996-10-01), Kamata et al.
patent: 5581436 (1996-12-01), Summerfelt et al.
patent: 5633781 (1997-05-01), Saenger et al.
patent: 5828094 (1998-10-01), Lee

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