Method of forming semiconductor devices using gate electrode...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S408000, C257S369000, C257S900000

Reexamination Certificate

active

06239467

ABSTRACT:

FIELD OF THE INVENTION
The present invention is generally directed to the manufacture of semiconductor devices. More particularly, the invention is directed to the manufacture of semiconductor devices in which the drive current strength of the transistors can be controlled using gate electrode length and spacer width.
BACKGROUND OF THE INVENTION
Over the last few decades, the electronics industry has undergone a revolution by the use of semiconductor technology to fabricate small, highly integrated electronic devices. The most common semiconductor technology presently used is silicon-based. A large variety of semiconductor devices have been manufactured having various applicabilities and numerous disciplines. An example of such a silicon-based semiconductor device is a metal-oxide-semiconductor (MOS) transistor. The principle elements of a typical MOS semiconductor device are illustrated in FIG.
1
. The device generally includes a gate electrode
101
, which acts as a conductor, to which an input signal typically is applied via a gate terminal (not shown). Heavily doped source region
103
and drain region
105
are formed in a semiconductor substrate
107
, and respectively are connected to source and drain terminals (not shown).
A channel region
109
is formed in the semiconductor substrate
107
beneath the gate electrode
101
and separates the source region
103
and drain region
105
. The channel typically is lightly doped with a dopant of a type opposite to that of the source and drain regions. The gate electrode
101
is physically separated from the semiconductor substrate
107
by a gate insulating layer
111
. Typically, this insulating layer is an oxide layer such as SiO
2
. The insulating layer
111
is provided to prevent current from flowing between the gate electrode
101
and the semiconductor source region
103
, drain region
105
or channel region
109
.
In operation, an output voltage typically is developed between the source and drain terminals. When an input voltage is applied to the gate electrode
101
, a transverse electric field is set up in the channel region
109
. By varying the transverse electric field, it is possible to modulate the conductance of the channel region
109
between the source region
103
and drain region
105
. In this manner, an electric field controls the current flow through the channel region
109
. This type of device commonly is referred to as a MOS field-effect transistor (MOSFET). Semiconductor devices such as the one described are used in large numbers to construct most modern electronic devices. In order to increase the capability of such electronic devices, it is necessary to integrate ever larger numbers of such devices into a single silicon wafer. As the semiconductor devices are scaled down in order to form a larger number of such devices on a given surface area, the structure of the devices and the fabrication techniques used to make the devices must be altered.
One important property of MOS devices is drive current strength. It is particularly important to provide semiconductor devices that exhibit the designed drive current strength. It also is desirable to maintain a substantially constant drive current strength between production lots and within a single production lot.
The drive current strength is inversely proportional to channel length. The length of the channel is determined by the dimensions of the gate electrode and any spacers that are present on the sides of the gate electrode during dopant implanting steps. As the dimensions of semiconductor devices become smaller and smaller, production variations in channel length, resulting, for example, from variations in gate electrode or spacer dimensions from the desired dimensions, have an increased significance with respect to variations in drive current strength.
SUMMARY OF THE INVENTION
Generally, the present invention relates to a method of producing a semiconductor device with transistors having controlled drive current strength. Consistent with the present invention, a semiconductor device is formed by forming a gate electrode over a substrate. The length of the gate electrode is measured and compared to a desired design length. A spacer is formed on the gate electrode. The size of the spacer is determined, based on the difference between the measured and designed length of the gate electrode layer. Thus, the spacer can be varied to take into account the variation in gate electrode length from the desired value. This allows the drive current strength of the final semiconductor device to be controlled and also permits variations within and between lots of the semiconductor devices to be reduced. The spacer can be formed in multiple steps to provide even greater flexibility and accuracy.
The above summary of the present invention is not intended to describe each illustrated embodiment or every implementation of the present invention. The figures and detailed description that follow describe the embodiments more particularly.


REFERENCES:
patent: 4994866 (1991-02-01), Awano
patent: 5296401 (1994-03-01), Mitsui et al.
patent: 5733812 (1998-03-01), Ueda et al.
patent: 5789780 (1996-12-01), Fulford et al.
The American Heritage Dictionary, Second College Edition, p. 162, 1982.

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