Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2006-06-20
2006-06-20
Lindsay, Jr., Walter L. (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S588000
Reexamination Certificate
active
07064051
ABSTRACT:
Embodiments of the invention provide methods of forming SAC pads in non-straight semiconductor device having non-straight type or separate type active regions. A plurality of gate line structures extending in one direction may be formed on a semiconductor substrate having non-straight active regions. An interlayer insulating layer covering gate line structures may be formed on the gate line structures. Then, a photo-resist layer may be formed on the interlayer insulating layer. A photo-resist pattern may be formed through exposing and developing the photo-resist layer by using a photo-mask having, for example, a bar type, a wave type, or a reverse active type pattern. Then, contact holes exposing source/drain regions may be formed by etching the interlayer insulating layer using the photo-resist pattern as an etching mask. Contact pads may then be formed by filling the contact holes with a conductive material.
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Goo Doo-Hoon
Lee Eun-Mi
Lee Jung-Hyeon
Yeo Gi-Sung
Lindsay Jr. Walter L.
Marger & Johnson & McCollom, P.C.
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