Method of forming radiation hard integrated circuits

Details Method of forming radiation hard integrated circuits Method of forming radiation hard integrated circuits

1992-06-26

1995-05-23

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 37, 437938, H01L 21266

Patent

active

054181747

ABSTRACT:
A method is provided for forming a radiation hard dielectric region of a semiconductor integrated circuit, and an integrated circuit formed according to the same. A field oxide region, a gate oxide layer and an interlevel dielectric layer are formed over the integrated circuit. Silicon ions are implanted separately into the field oxide region, gate oxide layer and interlevel dielectric layer to a sufficient dosage of less than or equal to approximately 1.times.10.sup.14 /cm.sup.2 to form electron traps to capture radiation induced electrons. This method allows for selective enhancement of radiation hardness of a portion of a circuit, thus providing an on-chip "dosimeter" which can be used to compensate the circuit for the loss of performance due to ionizing radiation.

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