Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2011-07-05
2011-07-05
Brewster, William M. (Department: 2823)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S743000, C438S756000
Reexamination Certificate
active
07972967
ABSTRACT:
A method of forming patterns of a semiconductor device comprising forming an auxiliary layer over an underlying layer comprising a cell region and a select transistor region, forming a first passivation layer over the auxiliary layer, wherein the first passivation layer blocks the auxiliary layer of the select transistor region and opens the auxiliary layer of the cell region, and forming a first photoresist pattern having a narrower width than the first passivation layer over (a) the first passivation layer and (b) second photoresist patterns, each having a narrower width than the first photoresist pattern, over an opening region of the auxiliary layer, wherein a gap between the first and second photoresist patterns is identical in width with a gap defined between the second photoresist patterns.
REFERENCES:
patent: 7727889 (2010-06-01), Choi et al.
patent: 2009/0035584 (2009-02-01), Tran et al.
patent: 100874433 (2008-12-01), None
patent: 1020090072920 (2009-07-01), None
Brewster William M.
Hynix / Semiconductor Inc.
Marshall & Gerstein & Borun LLP
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