Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2010-06-16
2011-11-15
Lee, Cheung (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S128000, C438S257000, C438S589000, C257SE21179, C257SE21532, C257SE21662
Reexamination Certificate
active
08058160
ABSTRACT:
A method of forming the gate patterns of a nonvolatile memory device comprises stacking a gate insulating layer and a first conductive layer over a semiconductor substrate; forming isolation hard mask patterns over the first conductive layer; etching the first conductive layer using the isolation hard mask patterns as etch barriers, thus exposing the gate insulating layer; etching the gate insulating layer using the isolation hard mask patterns as etch barriers, thus exposing the semiconductor substrate; after exposing the semiconductor substrate, forming a passivation layer on the sidewalls of the first conductive layers and on the sidewalls of the gate insulating layers; and etching the semiconductor substrate using the passivation layer and the isolation hard mask patterns as etch barriers, thus forming trenches in the semiconductor substrate.
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Hynix / Semiconductor Inc.
Lee Cheung
Marshall & Gerstein & Borun LLP
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