Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2007-05-16
2009-12-08
Mulpuri, Savitri (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S751000, C257SE21305, C257SE21429
Reexamination Certificate
active
07629245
ABSTRACT:
A method of fabricating a non-volatile memory device, wherein a gate insulating layer, a first conductive layer, a tunneling layer, a trap nitride layer, a blocking oxide layer, and a capping layer are sequentially formed over a semiconductor substrate of a peripheral region. A contact region of the capping layer is etched. A spacer is formed on sidewalls of the capping layer. A contact region of the blocking oxide layer is etched by using the spacer as a mask. The spacer is removed while etching a contact region of the trap nitride layer. A contact region of the tunneling layer is etched.
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Choi Calvin
Hynix / Semiconductor Inc.
Marshall & Gerstein & Borun LLP
Mulpuri Savitri
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