Method of forming non-volatile memory device

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation

Reexamination Certificate

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C438S751000, C257SE21305, C257SE21429

Reexamination Certificate

active

07629245

ABSTRACT:
A method of fabricating a non-volatile memory device, wherein a gate insulating layer, a first conductive layer, a tunneling layer, a trap nitride layer, a blocking oxide layer, and a capping layer are sequentially formed over a semiconductor substrate of a peripheral region. A contact region of the capping layer is etched. A spacer is formed on sidewalls of the capping layer. A contact region of the blocking oxide layer is etched by using the spacer as a mask. The spacer is removed while etching a contact region of the trap nitride layer. A contact region of the tunneling layer is etched.

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patent: 2005/0037623 (2005-02-01), Hsieh et al.
patent: 10-1999-0057081 (1999-07-01), None
patent: 10-0244292 (1999-11-01), None

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