Radiation imagery chemistry: process – composition – or product th – Imaging affecting physical property of radiation sensitive... – Making electrical device
Reexamination Certificate
1999-06-30
2001-11-13
Duda, Kathleen (Department: 1756)
Radiation imagery chemistry: process, composition, or product th
Imaging affecting physical property of radiation sensitive...
Making electrical device
C430S317000, C216S041000, C216S072000
Reexamination Certificate
active
06316166
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a process for fabricating a semiconductor device and, more particularly, to a method of forming a micro pattern of semiconductor devices which is suitable to have a line width less than 0.1 &mgr;m.
2. Discussion of Related Art
Semiconductor chips, that is, integrated circuits (ICs) have been developed with the development of techniques in the process of micro circuits.
As semiconductor devices have a more complicated structure due to large integration and high performance, it is increasingly needed to use a technique for forming a micro pattern on the semiconductor devices.
The development of such a technique for micro circuits enabled integration of more circuits and made it possible to enhance the processing capacity through reduction of delayed time as well as resulting in larger integration and capacity of chips.
Although the techniques in the 1950s when a semiconductor chip was developed for the first time have realized a micro circuit of 15 &mgr;m, there are commercially available chips having a circuit line width less than 0.35 &mgr;m as well as sub-micron chips of below 0.5 &mgr;m in recent.
Especially, it is required to use a technique for patterning a micro circuit having a line width less than 0.2 &mgr;m with a view to performing a process for DRAMs of above Giga byte level and one having a line width of below 0.12 &mgr;m to perform a process for DRAMs of 4 Giga byte level.
A development of the technique in the process for micro circuits enabled integration of chips that are increased in number by about two times every two years, and such an inclination is expected to be accelerated in the future.
The most basic technique in the process for micro circuits is lithography, which is classified into photolithography, electron beam lithography and X-ray lithography.
Generally, a g-line photo stepper having an output wavelength of 436 nm is used for the design rule in which the line width is greater than 0.7 &mgr;m, while an i-line photo stepper having an output wavelength of 365 nm is used for sub-micron design rule.
An excimer stepper using a phase shift mask technique in which the phase of light is changed by about 180° is utilized in the lithography of sub-micron level.
It is indispensable to use a photomask for selectively transmitting a light for the sake of scanning the pattern in the photolithography which is a technique using ultraviolet rays as a source of light for exposure process.
The light passed through the photomask arrives at the photoresist, forming a latent image on the photoresist. A photoresist pattern is then formed in the subsequent exposure process. This photoresist pattern is used as a mask in an etching process to form a device in a desired pattern.
The photoresist is formed from a mixture having such a property that the internal structure is changed with an exposure to energy of various forms such as light or heat. This photoresist is classified into two categories, positive and negative photoresists.
When the negative photoresist is exposed to the light, the bonding structure in the irradiated portion is hardened into a mesh structure and the portion not exposed to the light is removed in the development process. The positive photoresist refers to a photoresist in which the bonding structure in the portion exposed to the light is loosened.
Etching a pattern by use of such a photoresist pattern may cause various problems in the actual devices. One of the problems lies in that the thickness of the photoresist becomes abnormal in the rough portion on the surface of the device having a large step difference, or that conditions for the exposure are not optimized. Furthermore, a decrease in the thickness of the photoresist for the sake of definition of the pattern may cause pin holes.
Hereinafter, a method of forming a micro pattern of semiconductor devices according to prior art will be described with reference to the accompanying drawings.
FIGS. 1
a
-
1
d
are cross-sectional views for illustrating the method of forming a micro pattern of semiconductor devices according to the prior art.
As shown in
FIG. 1
a
, a hard mask layer
12
is formed on a layer
11
to be etched so as to form a micro pattern.
After deposition of a photoresist on the hard mask layer
12
, exposure and development are performed to pattern the photoresist and form a photoresist pattern
13
having the minimum line width.
The minimum line width of the photoresist pattern
13
patterned with current exposure equipment is greater than 0.25 &mgr;m.
As shown in
FIG. 1
b
, the photoresist pattern
13
is subjected to an oxygen (O
2
) ashing process to form a pattern having a line width (0.2 &mgr;m) smaller than that of the photoresist pattern
13
.
The line width of the photoresist pattern
13
is reduced by about 0.05 &mgr;m by the oxygen asing process. That means, the line width of the photoresist
13
after the oxygen asing process is about 0.2 &mgr;m.
As shown in
FIG. 1
c
, the photoresist pattern
13
is used as a mask in removing the hard mask layer
12
to form an underlying pattern
12
a.
The line width of the underlying pattern
12
a
is 0.2 &mgr;m as same as that of the photoresist
13
.
As shown in
FIG. 1
d
, the photoresist pattern
13
is removed. The underlying pattern
12
a
is used as a mask in selectively removing the layer
11
to be etched, forming a micro pattern of the prior art.
In the method of forming a micro pattern of semiconductor devices according to the prior art, however, there are some problems as follows.
First, an additional process is required such as oxygen asing process for reducing the line width of the pattern photoresist. Thus the entire process becomes too complicated.
Second, it is needed to use a hard mask layer that has a high selectivity ratio with respect to the photoresist in etching the hard mask layer by use of the photoresist as a mask, because the thickness and line width of the photoresist are both reduced in the oxygen asing process. Such a decrease in the thickness of the photoresist that is used as a mask makes it impossible to etch the hard mask layer in a desired profile.
SUMMARY OF THE INVENTION
Accordingly, an object of the present invention is to provide a method of forming a micro pattern of semiconductor devices which is designed to simplify the process and form a micro pattern having a line width less than 0.1 &mgr;m.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, a method of forming a micro pattern of semiconductor devices includes the steps of: forming a hard mask layer on a layer to be etched; depositing and patterning a photoresist on the hard mask layer to form a photoresist pattern having a first line width; etching the photoresist pattern and the hard mask layer at once to form a hard mask layer pattern having a second line width smaller than the first line width; and selectively removing the layer to be etched by using the hard mask layer pattern as a mask to form the micro pattern.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.
REFERENCES:
patent: 5023203 (1991-06-01), Choi
patent: 5445710 (1995-08-01), Hori et al.
patent: 5707487 (1998-01-01), Hori et al.
patent: 5753418 (1998-05-01), Tsai et al.
patent: 6027861 (2000-02-01), Yu et al.
patent: 6030882 (2000-02-01), Hong
patent: 6071824 (2000-06-01), Singh et al.
patent: 6090674 (2000-07-01), Hsieh et al.
patent: 6093973
Chi Sung Hon
Ha Jae Hee
Duda Kathleen
Fleshner & Kim LLP
Hyundai Electronics Industries Co,. Ltd.
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