Method of forming metal wiring in a semiconductor device

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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Details

C438S702000, C257SE21579

Reexamination Certificate

active

10989668

ABSTRACT:
A method of forming metal wiring in a semiconductor device is disclosed. The method uses a dual damascene process in which a trench is formed prior to a via-hole.

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patent: 6492734 (2002-12-01), Watanabe
patent: 6589711 (2003-07-01), Subramanian et al.
patent: 2002/0182874 (2002-12-01), Wang
patent: 2003/0092260 (2003-05-01), Lui et al.
patent: 2004/0036076 (2004-02-01), Arita et al.
patent: 2005/0124152 (2005-06-01), Meagley et al.
patent: 2002-124568 (2002-04-01), None
patent: 1020020037805 (2002-05-01), None
patent: 1020020088399 (2002-11-01), None

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