Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
1999-03-18
2001-07-17
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
Reexamination Certificate
active
06261976
ABSTRACT:
BACKGROUND OF THE INVENTION
(1) Field of the Invention
The invention relates to the fabrication of integrated circuit devices, and more particularly, to a method of improving gate oxide quality and reliability in the fabrication of integrated circuits.
(2) Description of the Prior Art
In the fabrication of integrated circuits, a gate dielectric, typically silicon oxide, is grown on the surface of a monocrystalline silicon semiconductor substrate. A polysilicon layer is deposited overlying the gate oxide layer and patterned to form polysilicon gate electrodes. Upon implanting the gate polysilicon with boron or BF
2,
boron ions can penetrate the gate oxide layer causing a threshold voltage shift. Nitriding the gate oxide layer can prevent ion penetration. However, nitrogen incorporation into the gate oxide will degrade reliability in terms of charge-to-breakdown value (Q
bd
). It is desired to form a nitrided gate dielectric, such as silicon oxynitride that will not degrade Q
bd
.
Various patents describe methods of forming gate dielectric layers including silicon oxynitride. These include U.S. Pat. No. 5,407,870 to Okada et al, U.S. Pat. No. 5,464,792 to Tseng et al, U.S. Pat. No. 5,397,720 to Kwong et al, U.S. Pat. No. 5,464,783 to Kim et al, and U.S. Pat. No. 5,726,087 to Tseng et al. These patents teach methods of forming the oxynitride layers at atmospheric pressure (stated or implied) except for the patent to Kim et al which deposits silicon oxynitride by chemical vapor deposition (CVD) at 800° C. and a pressure of 13 Pascals, which is 0.1 torr.
SUMMARY OF THE INVENTION
A principal object of the present invention is to provide an effective and very manufacturable method of improving gate oxide quality.
A further object of the invention is to provide a method of improving oxide quality by preventing the penetration of impurities into the gate oxide layer.
Yet another object is to provide a method of improving oxide quality by improving thickness uniformity.
Yet another object is to provide a method of improving gate oxide reliability by improving the charge-to-breakdown value.
A still further object of the invention is to provide a method of improving oxide quality and reliability by using low pressure during oxidation and nitridation.
In accordance with the objects of this invention a method for improving oxide quality and reliability by using low pressure during oxidation and nitridation is achieved. The wafer is loaded into a chamber wherein a pressure of between about 80 and 300 torr is maintained during the forming of the dielectric layer. The silicon substrate of the wafer is oxidized, then nitrided. The substrate is annealed to complete formation of the dielectric layer.
REFERENCES:
patent: 5397720 (1995-03-01), Kwong et al.
patent: 5407870 (1995-04-01), Okada et al.
patent: 5464783 (1995-11-01), Kim et al.
patent: 5464792 (1995-11-01), Tseng et al.
patent: 5726087 (1998-03-01), Tseng et al.
patent: 5885870 (1999-03-01), Maiti et al.
Chartered Semiconductor Manufacturing Ltd.
Hoang Quoc
Nelms David
Pike Rosemary L. S.
Saile George O.
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