Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2005-07-06
2008-03-25
Baumeister, B. William (Department: 2891)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C257S352000, C257SE21040, C438S967000, C117S008000, C117S009000
Reexamination Certificate
active
07348226
ABSTRACT:
A method (and resultant structure) of forming a semiconductor structure, includes processing an oxide to have a crystalline arrangement, and depositing an amorphous semiconductor layer on the oxide by one of evaporation and chemical vapor deposition (CVD).
REFERENCES:
patent: 3986197 (1976-10-01), Ablassmeier
patent: 4891329 (1990-01-01), Reisman et al.
patent: 4980339 (1990-12-01), Setsune et al.
patent: 5019529 (1991-05-01), Takasaki
patent: 5037774 (1991-08-01), Yamawaki et al.
patent: 5248564 (1993-09-01), Ramesh
patent: 5478653 (1995-12-01), Guenzer
patent: 5600154 (1997-02-01), Shimizu et al.
patent: 5643804 (1997-07-01), Arai et al.
patent: 5808319 (1998-09-01), Gardner et al.
patent: 5828080 (1998-10-01), Yano et al.
patent: 5830270 (1998-11-01), McKee et al.
patent: 5847419 (1998-12-01), Imai et al.
patent: 5930612 (1999-07-01), Ito
patent: 6045626 (2000-04-01), Yano et al.
patent: 6096434 (2000-08-01), Yano et al.
patent: 6235563 (2001-05-01), Oka et al.
patent: 6242298 (2001-06-01), Kawakubo
patent: 6248621 (2001-06-01), Wilk et al.
patent: 6258459 (2001-07-01), Noguchi et al.
patent: 6281559 (2001-08-01), Yu et al.
patent: 6348373 (2002-02-01), Ma et al.
patent: 6376337 (2002-04-01), Wang et al.
patent: 6404027 (2002-06-01), Hong et al.
patent: 6407435 (2002-06-01), Ma et al.
patent: 6528377 (2003-03-01), Mihopoulos et al.
patent: 6569240 (2003-05-01), Nishikawa et al.
patent: 6610548 (2003-08-01), Ami et al.
patent: 6696309 (2004-02-01), Yamanaka et al.
patent: 6709935 (2004-03-01), Yu
patent: 6756277 (2004-06-01), Yu
patent: 6768175 (2004-07-01), Morishita et al.
patent: 6933566 (2005-08-01), Bojarczuk, Jr. et al.
patent: 2002/0013011 (2002-01-01), Yamanaka et al.
patent: 2002/0195602 (2002-12-01), Klosowiak
patent: 2003/0057432 (2003-03-01), Gardner et al.
patent: 2005/0166834 (2005-08-01), Atanackovic
patent: 2005/0233529 (2005-10-01), Pomarede et al.
Sze, S. M. Physics of Semiconductor Devices. 2ndEd. New York: John Wiley & Sons. 1981. p. 29.
Sze, S. M. Physics of Semiconductor Devices. 2nd Ed. John Wiley & Sons, New York (1981); p. 29.
Sze, S. M. Physics of Semiconductor Devices. 2nd Ed. John Wiley & Sons, New Work (1981); p. 29.
J. Haeni, D. G. Schlom, Materials Research Society 2001 Meeting, Apr. 2001, San Francisco, “LaA103 Derivative Structure for Alternative Gate Dielectrics”.
“Crystalline Oxides on Silicon: The First Five Monolayers”, Rodney A. McKee et al., Physical Review Letters, vol. 81, No. 14, Oct. 5, 1998, pp. 3014-3017.
“Epitaxial Ceo2 on Silicon Substrates and the Potential of Si/ceo2/si for SOI Structures”, A.H. Morshed etal., Mat.Res.Soc. Symp. V474,339(1197).
Bojarczuk, Jr. Nestor Alexander
Copel Matthew Warren
Guha Supratik
Narayanan Vijay
Baumeister B. William
International Business Machines - Corporation
McGinn IP Law Group PLLC
Such Matthew W.
Tuchman, Esq. Ido
LandOfFree
Method of forming lattice-matched structure on silicon and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of forming lattice-matched structure on silicon and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of forming lattice-matched structure on silicon and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3964496