Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Total dielectric isolation
Reexamination Certificate
2007-02-13
2007-02-13
Tsai, H. Jey (Department: 2812)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Total dielectric isolation
C438S413000, C438S442000, C257SE29020
Reexamination Certificate
active
11320591
ABSTRACT:
A method is provided in which a first oxide layer is deposited on a silicon substrate and etched to form openings. A first silicon epitaxial layer is grown on the substrate in the openings, forming first active regions, a second oxide layer is deposited thereon, and the first and second oxide layers are etched such that the first oxide layer is wholly removed and the second oxide layer remains only on the first silicon epitaxial layer. A third oxide layer is thermally grown on entire resultant surfaces and then blanket-etched to remain only on sidewalls of the first silicon epitaxial layer. A second silicon epitaxial layer is grown on the exposed substrate between the first active regions, thus forming second active regions. The second oxide layer remaining on the first silicon epitaxial layer is removed. The first and second active regions are separated and electrically isolated by the third oxide layer.
REFERENCES:
patent: 5279687 (1994-01-01), Tuppen et al.
Dongbu Electronics
Mayer Brown Rowe & Maw LLP
Tsai H. Jey
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