Method of forming isolation film in semiconductor device

Details Method of forming isolation film in semiconductor device Method of forming isolation film in semiconductor device

2000-06-01

2003-08-26

Smith, Matthew (Department: 2825)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Recessed oxide by localized oxidation

C438S444000, C438S225000, C438S452000, C438S227000, C438S228000, C438S585000

Reexamination Certificate

active

06610581

ABSTRACT:

BACKGROUND OF THE INVENTION
Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device, particularly to a method of forming an isolation film.
In recent years, there has been an increasing demand for the miniaturization of an isolation film with the high integration and high densification of an ultra large scale integrated circuit (ULSI). A selective oxidation method (Local Oxidation of Silicon, hereinafter referred to as LOCOS method) has been used in a conventional isolation technique, but in the LOCOS method, an isolation part necessarily rises because of volume expansion during oxidation, and flatness of the substrate surface is remarkably deteriorated. Therefore, when a semiconductor element is formed in the active region of a semiconductor substrate, there is a problem that the film thickness formed by photolithography fails to be uniform and fine working becomes difficult.
In order to solve -this problem, a technique is proposed to etch a shallow trench in a region to which an isolation film is to be formed in a silicon substrate, and form the isolation film by oxidation by the LOCOS method so that unevenness of the substrate surface caused by oxidation is reduced. This technique is called the recessed LOCOS method, and is disclosed, for example, in Japanese Patent Application Laid-Open No. 88092311997.
When the conventional recessed LOCOS method is used to manufacture a miniaturized semiconductor device, the following problem occurs. As shown in
FIG. 5
, a (111) crystal face (facet)
55
of silicon as substrate material
54
appears in the vicinity of the boundary between region
52
of isolation film
51
and an active region
53
, and an oxidation inhibiting layer
58
called a white ribbon is generated in the vicinity of the tip end of a bird's beak
57
. The reason for appearance of the silicon (111) crystal face is considered as follows: As the edge of the isolation region
52
adjacent to the active region
53
is covered with a thick silicon nitride film Q to prevent oxidation of the active region
58
, volume expansion accompanying oxidation is not permitted, and therefore the oxidation speed is reduced and the silicon (111) crystal face inherently having a high oxidation speed appears. Since no oxidation occurs even in the presence of oxidation species, the silicon (111) crystal face remains. Moreover, the white ribbon is considered to be formed when part of the silicon nitride film Q is oxidized by the oxidation species to generate ammonia, and the ammonia causes nitriding of the substrate material of silicon.
In order to form the gate dielectric film in the active region
53
, as shown in
FIG. 61
the silicon nitride film Q is removed by etchings the active region
53
is then thermally oxidized, and an oxide film called a sacrificial oxide film is formed in the active region
53
. The oxidation of the active region
53
in the vicinity of bird's beak
57
is inhibited by the white ribbon. Therefore, a protrusion is formed in the region where the white ribbon existed. The protrusion is connected to the (111) crystal face, and a steep corner part
56
is therefore formed. As a result, the following problems occur.
(1) For the gate oxide film formed in the active region
53
, no uniform oxidation occurs in the corner part
56
, the oxide film of the part becomes thin, causing deteriorated withstand voltage of the gate oxide film.
(2) When MOS transistor structure is formed such that the gate electrode formed in the active region rides on the isolation film
51
, and electric field is concentrated in the corner part
56
, the gate threshold voltage in the part with a small gate width drops, and leakage easily occurs during actual use.
SUMMARY OF THE INVENTION
Wherefore, it is an object of the present invention to provide a method of manufacturing a semiconductor device which is miniaturized but is provided with a superior isolation structure.
To attain this and other objects, according to the present invention, there is provided a semiconductor device manufacturing method which includes the steps of: forming at least two trenches in a semiconductor substrate to form an active region; covering the active region with a non-oxidizable mask; and oxidizing the is trench to form an isolation film. In this method, a ratio W/t of width W to thickness t of the non-oxidizable mask is set at 3.8 or higher.
Since the non-oxidizable mask is easily elastically deformed during the oxidation of the trench by setting the ratio Wit of width W to thickness t of the non-oxidizable mask to 3.8 or more as described above, no (111) crystal face (facet) of silicon appears in the vicinity of the boundary between the isolation film forming region and the active region, and the boundary part between the active region and the isolation film forming region is substantially rounded. As a result, the corner part of the boundary between the active region and the isolation film forming region does not become steep,
Moreover, in this case, when active regions with different widths are formed on the substrate, the thickness of the non-oxidizable mask formed on the active region with a small width is preferably less than the thickness of the non-oxidizable mask formed on the active region with a large width. This can reduce the stress imposed on the active region with the small width, by the non-oxidizable mask formed on the active region.
Additionally, the temperature of oxidation is preferably set to 1050° C. or more, but preferably in a range of 1050° C. to 1150° C., considering the operation efficiency of a furnace. The action of the present invention can therefore be obtained reliably,
Moreover, it is preferable to form a buffer layer under the non-oxidizable mask before oxidizing the trench. This can relax the stress imposed on the substrate by the non-oxidizable mask when the trench is oxidized.


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