Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2005-07-05
2005-07-05
Le, Dung A. (Department: 2818)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S737000, C438S738000, C438S744000
Reexamination Certificate
active
06913990
ABSTRACT:
A method of providing dummy fill structures to meet the strict requirements for planarizing MRAM (Magnetic Random Access Memory) and other semiconductor devices to gain silicon floor space and allow maximum use of wiring levels. The method deposits a sacrificial or dummy layer of dielectric material such as SiO2to form dummy fill structures prior to the planarization steps. The insulative dummy fill structures allow the use of less precise lithography and etching methods. The dummy fill structures provide support during the CMP process that planarizes the active devices prior to depositing another layer of SiO2and etching lines of metallization. Since the dummy structures are made of a dielectric rather than conductive materials, the risk of shorts between levels of metallization and between active devices and lines of metallization is reduced.
REFERENCES:
patent: 6717267 (2004-04-01), Kunikiyo
Infineon - Technologies AG
Le Dung A.
Slater & Matsil L.L.P.
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