Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support
Patent
1997-12-17
1999-05-18
Chaudhuri, Olik
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Metallic housing or support
29827, H01L21/48
Patent
active
059045035
ABSTRACT:
The invention is a method which deliberately applies exaggerated features (22,32) on the photo-image used to pattern the lead frame for etching. The resulting etched leads (20,25,29) will have a flat to concave shape at the end of the lead tips (23,26,30), which can be used to "self-center" wire bond paths, eliminating the slung wire tendency altogether, provided the wire path crosses the lead tip within the concave shape region.
REFERENCES:
patent: 5683943 (1997-11-01), Yamada
Frechette Raymond A.
Sullivan Christopher M.
Brady III W. James
Chaudhuri Olik
Donaldson Richard L.
Texas Instruments Incorporated
Wille Douglas A.
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