Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Patent
1997-01-23
1998-04-28
Dutton, Brian
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
438655, 438659, H01L 2144, H01L 2148
Patent
active
057443980
ABSTRACT:
A method of forming an electrode of a semiconductor device includes the steps of forming an insulating layer on a semiconductor substrate, forming a tungsten silicide layer on the insulating layer, implanting impurity ions into the tungsten silicide layer to form an impurity region in a lower portion of the tungsten silicide layer, and carrying out a heat treatment to the substrate on which the tungsten silicide layer is formed.
REFERENCES:
patent: 4282647 (1981-08-01), Richman
patent: 5210043 (1993-05-01), Hosaka
patent: 5525543 (1996-06-01), Chen
Young-Wug Kim et al., "Microstructures of Tungsten Silicide Films Deposited by CVD and by Sputtering", Semiconductor R&D Center, Samsung Electronics Co., Ltd.,: 1-6.
T.H. Tom Wu et al., "Properties of Wsi.sub.x using dichlorosilane in a single-wafer system", J. Vac. Sci. Technol. B6(6): 1707-1713 (1988).
S.G. Telford et al., "Chemically Vapor Deposited Tungsten Silicide Films Using Dichlorosilane in a Single-Wafer Reactor", J. Electrochem. Soc., 140(12): 3689-3701 (1993).
Byun Jeong Soo
Lee Byung Hak
Dutton Brian
IG Semicon Co., Ltd.
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