Method of forming dual height solder interconnections

Metal fusion bonding – Process – Plural joints

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427 96, 427265, H01L 21283

Patent

active

052518060

ABSTRACT:
The present invention relates generally to a new interconnection and a method for making the same, and more particularly, to an elongated solder interconnection and a method for making the same. On an electronic carrier, a pad is formed on which a solder mass is deposited and capped with a metal layer, thereby forming an elongated solder interconnection. A further elongated solder interconnection can now be formed by forming a second solder mass on the first solder mass that has been capped by a metal layer. Additional elongated solder interconnection can be formed by capping the preceding solder mass and/or the last solder mass with a metal capping layer. Alternatively, the encapsulating layer can be in the form of a sidewall spacer formed on the sidewalls of the solder mass.

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IBM Technical Disclosure Bulletin, vol. 21, No. 7 Dec. 1978 pp. 2743-2746.
Matsui et al, "VLSI Chip Interconnection Technology Using Stacked Solder Bumps" pp. 573-578.

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