Method of forming dual gate dielectric layer

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material

Reexamination Certificate

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C438S157000, C438S176000, C438S283000

Reexamination Certificate

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10964170

ABSTRACT:
A method of forming a dual gate dielectric layer increases a performance of a semiconductor device by using a dielectric layer having a high dielectric constant, including forming a first dielectric layer having a predetermined thickness on a semiconductor substrate; removing the first dielectric layer formed on a second region, but leaving this layer on a first region; and forming a second dielectric layer having a dielectric constant higher than that of the first dielectric layer, on the first and second regions.

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patent: 6271143 (2001-08-01), Mendicino
patent: 6369421 (2002-04-01), Xiang et al.
patent: 6482715 (2002-11-01), Park et al.
patent: 6706577 (2004-03-01), Twu et al.
patent: 6888205 (2005-05-01), Moscatelli et al.
patent: 2003/0003639 (2003-01-01), Kanda et al.

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