Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2007-05-23
2010-02-16
Lebentritt, Michael S (Department: 2829)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S597000, C438S618000, C438S626000, C438S636000, C438S703000, C257SE21029, C257SE21253, C257SE21259, C257SE21266, C257SE21579
Reexamination Certificate
active
07662711
ABSTRACT:
A method of forming a dual damascene pattern for a metal interconnection by a relatively simple process. Only a portion of an interlayer insulating film is initially etched when forming a via hole. When the interlayer insulating is etched to form a trench, the remaining portion of the via hole may be etched simultaneously.
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Hwang Sang-Il
Lim Hyun Ju
Dongbu Hi-Tek Co., Ltd.
Lebentritt Michael S
Sherr & Vaughn, PLLC
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