Method of forming contact vias and interconnect channels in a di

Details Method of forming contact vias and interconnect channels in a di Method of forming contact vias and interconnect channels in a di

1996-06-27

1998-03-10

Breneman, R. Bruce

Semiconductor device manufacturing: process

Chemical etching

Combined with coating step

438637, 438700, 438740, 438978, H01L 2102

Patent

active

057261008

ABSTRACT:
A process is disclosed for forming interconnect channels and contact vias using a single mask. The interconnect channels are formed in an upper silicon dioxide dielectric layer, while the contact vias are formed in both the upper dielectric layer and a lower silicon dioxide dielectric layer. A primary silicon nitride etch stop layer is sandwiched between the upper dielectric layer and the lower dielectric layer, and an optional secondary silicon nitride etch stop layer is sandwiched between a subjacent conductive region and the lower dielectric layer. A contact via/interconnect channel photomask is formed on top of the upper dielectric layer. The critical dimension of the contact via openings is about twice the critical dimension of the interconnect channel openings. A reactive-ion etch, that is selective for silicon dioxide over silicon nitride is performed, exposing the primary etch stop layer in the contact via openings, but not along the length of the interconnect channels. The etch chemistry is then modified so that the reactive-ion etch becomes selective for silicon nitride over silicon dioxide, thus removing the primary silicon dioxide etch stop layer in the contact via openings. The initial etch chemistry is resumed, resulting in the contact being etched down to the secondary etch stop layer and the interconnect channel to the primary etch stop layer. These exposed portions of both etch stop layers are removed by reverting to the silicon nitride selective chemistry.

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