Method of forming conductive lines on a semiconductor wafer

Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Combined with the removal of material by nonchemical means

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438763, 438779, 438785, H01L 2144

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active

059942410

ABSTRACT:
A method of forming metal lines in a patterned dielectric layer. First, a thin (50 .ANG.-500 .ANG.) metal layer of a group VB metal, preferably niobium, is formed on a patterned dielectric layer. Next, an aluminum layer or an aluminum alloy layer is formed on the thin niobium layer. The aluminum layer is preferably formed by depositing a first thickness of collimated aluminum at low temperature followed by high temperature deposition of an equal thickness of aluminum. The aluminum layer is Chem-Mech polished (CMP) with an oxidizing acidic colloidal alumina slurry to expose and oxidize the thin niobium liner which acts as a polish stop. Then, the exposed thin niobium liner is removed using CMP. Alternatively, instead of niobium, the liner may be a thin layer of a group VB metal or an alloy thereof.

REFERENCES:
patent: 4702792 (1987-10-01), Chow et al.
patent: 4944836 (1990-07-01), Beyer et al.
patent: 5209816 (1993-05-01), Yu et al.
patent: 5246885 (1993-09-01), Braren et al.
patent: 5300155 (1994-04-01), Sandhu et al.
patent: 5332467 (1994-07-01), Sune et al.
patent: 5374592 (1994-12-01), MacNaughton et al.
patent: 5380546 (1995-01-01), Krishnan et al.
patent: 5424246 (1995-06-01), Matsuo et al.
patent: 5444022 (1995-08-01), Gardner et al.
patent: 5607718 (1997-03-01), Sasaki et al.
patent: 5612254 (1997-03-01), Mu et al.
patent: 5626715 (1997-05-01), Rostoker
"Alternative Materials and Structure of Chemical-Mechanical Polishing Technology for Advanced CMOS Products" IBM Technical Disclosure Bulletin, vol. 37, No. 9, pp. 145-146, Sept. 1994.

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