Method of forming collapse chip connection bumps on a...

Details Method of forming collapse chip connection bumps on a... Method of forming collapse chip connection bumps on a...

2011-07-26

2011-07-26

Garber, Charles D (Department: 2812)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Making plural separate devices

C228S179100

Reexamination Certificate

active

07985622

ABSTRACT:
A method of forming collapse chip connection bumps on a semiconductor substrate is provided. The method includes providing a semiconductor substrate having a plurality of bump vias on a top surface of the semiconductor substrate and electroplating the plurality of bump vias to form a plurality of via pads on the top surface of the semiconductor substrate. The method also includes disposing a plurality of solder microballs on the top surface of the semiconductor substrate, wherein each solder microball is placed on a corresponding via pad on the semiconductor substrate and reflowing the plurality of solder microballs to form the collapse chip connection bumps on the semiconductor substrate.

REFERENCES:
patent: 5251806 (1993-10-01), Agarwala et al.
patent: 5492235 (1996-02-01), Crafts et al.
patent: 2006/0267176 (2006-11-01), Offrein et al.
patent: 2009/0325379 (2009-12-01), Hlad et al.
“Micro-Ball Bumpng Technology for Flip Chip and TAB interconnections”, K. Tastsumi, K. Shimokawa, El Hashino, Y. Ohzeki, T. Nakamori and M. Tanaka; The International Jornal of Microcircuits and Electronic Packaging, vol. 22, No. 2, Second Quarter 1999.
“An Application of Micro-Ball Wafer Bumping to Double Ball Bump for Flip Chip Interconnection”Kohei Tatsumi, 2005 Electronic Components andTechnology Conference.

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