Method of forming CMOS transistors with dual-metal silicide...

Details Method of forming CMOS transistors with dual-metal silicide... Method of forming CMOS transistors with dual-metal silicide...

2011-01-04

2011-01-04

Kim, Paul D (Department: 3729)

Metal working

Method of mechanical manufacture

Electrical device making

C029S842000, C029S847000, C257S069000, C257S255000, C257S757000, C257S407000, C257S408000, C438S233000, C438S285000

Reexamination Certificate

active

07861406

ABSTRACT:
Methods and associated structures of forming a microelectronic device are described. Those methods may include amorphizing at least one contact area of a source/drain region of a transistor structure by implanting through at least one contact opening, forming a first layer of metal on the at least one contact area, forming a second layer of metal on the first layer of metal, selectively etching a portion of the second metal layer, annealing the at least one contact area to form at least one silicide, and removing the unreacted first metal layer and second metal layer from the transistor structure and forming a conductive material in the at least one contact opening.

REFERENCES:
patent: 6905922 (2005-06-01), Lin et al.

Affiliated with

Also associated with

Rating

Method of forming CMOS transistors with dual-metal silicide... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of forming CMOS transistors with dual-metal silicide..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of forming CMOS transistors with dual-metal silicide... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2684541