Method of forming cavity between multilayered wirings

Details Method of forming cavity between multilayered wirings Method of forming cavity between multilayered wirings

2006-05-23

2006-05-23

Estrada, Michelle (Department: 2823)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S623000, C438S780000

Reexamination Certificate

active

07049220

ABSTRACT:
A method of forming a cavity between metallic wirings using a polymer capable of revealing a specific heat resistant temperature and a specific heat decomposition temperature by having a specific repeating unit structure and a specific molecular weight range and of readily forming a cavity structure between metallic wirings in, for example, semiconductors. The method comprises a step of coating the surface of a first dielectric film formed on a semiconductor substrate with a cyclic olefin based addition polymer, a step of patterning the cyclic olefin based addition polymer as a void-forming polymer, a step of forming a metallic wiring in the pattern formed on the void-forming polymer, a step of forming a second dielectric film on the void-forming polymer containing a metallic wiring, and a step of removing the void-forming polymer between the multilayered wirings by heating to form a cavity between the metallic wirings.

REFERENCES:
patent: 6165890 (2000-12-01), Kohl et al.
patent: 2002/0090831 (2002-07-01), Yoshida et al.
Shick et al., “New Olefinic Interlevel Dielectric Materials for Multi-Chip Modules”, 1996, IEEE.
U.S. Appl. No. 10/693,972, filed Oct. 28, 2003, Kurosawa et al.
U.S. Appl. No. 10/969,065, filed Oct. 21, 2004, Oshima, et al.

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