Coating processes – Coating by vapor – gas – or smoke – Mixture of vapors or gases utilized
Reexamination Certificate
2002-08-02
2004-09-21
Meeks, Timothy (Department: 1762)
Coating processes
Coating by vapor, gas, or smoke
Mixture of vapors or gases utilized
C427S255391, C427S255393, C427S255394, C427S255700
Reexamination Certificate
active
06793969
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention generally relates to film forming technology and more particularly to a method of forming a conductive film by a CVD process and also a CVD apparatus.
Film forming technology is a fundamental and important technology in the fabrication process of semiconductor devices.
When fabricating a semiconductor device, it has been widely practiced to form a semiconductor film or an insulation film by a CVD (chemical vapor deposition) process. On the other hand, other processes, such as a sputtering process, have been used for forming conductive films such as wiring layers.
On the other hand, there is a growing need for the technology of forming a conductive film, such as a metal film or conductive metal compound film, as the capacitor electrode of high-dielectric or ferroelectric MIM capacitors, as in the case of a memory capacitor of a DRAM (dynamic random access memory) or a ferroelectric capacitor of a ferroelectric memory device, wherein such an MIM capacitor uses a high-dielectric film or a ferroelectric film as the capacitor insulation film in combination with the capacitor electrode.
FIG. 1
shows the construction of a typical DRAM
10
that has such an MIM high-dielectric capacitor.
Referring to
FIG. 1
, the DRAM
10
is constructed on a Si substrate
11
in correspondence to a device region
11
A defined by a device isolation structure
12
, wherein there is provided a gate electrode
14
having a polycide structure on the Si substrate
11
via an intervening gate insulation film
13
. The gate electrode
14
thus formed constitutes a part of the word line of the DRAM. Further, a pair of diffusion regions
11
a
and
11
b
are formed in the Si substrate
11
at both lateral sides of the gate electrode
14
, and the gate electrode
14
is covered with an interlayer insulation film
15
provided on the Si substrate
12
.
On the interlayer insulation film
15
, there is provided a bit line electrode in correspondence to the diffusion region
11
a
, wherein the bit line electrode
16
makes a contact with the diffusion region
11
a
at a contact hole
15
A formed in the interlayer insulation film
15
via a polysilicon contact plug
16
A filling the contact hole
15
A.
On the interlayer insulation film
15
, there is provided a memory cell capacitor
17
having an MIM structure in correspondence to the diffusion region
11
b
, wherein the MIM capacitor
17
makes an electrical contact with the diffusion region
11
b
at a contact hole
15
B formed in the interlayer insulation film
15
via a polysilicon contact plug
16
B provided in the contact hole
15
B.
It should be noted that the memory cell capacitor
17
includes a lower electrode
17
a
formed on the interlayer insulation film
15
in electrical contact with the contact plug
16
B, a capacitor insulation film
17
b
formed on the lower electrode
17
a
and an upper electrode
17
c
formed on the capacitor insulation film
17
b
, wherein recent, highly miniaturized DRAMs tend to use a high dielectric material such as Ta
2
O
5
characterized by a very large specific dielectric constant, for the capacitor insulation film
17
b
in place of conventional SiO
2
film or an ONO film, in which a SiN film is sandwiched by a pair of SiO
2
films.
Further, it is possible to construct a ferroelectric memory from such a DRAM, by substituting the high-dielectric film constituting the capacitor insulation film
17
b
with a ferroelectric film such as PZT (Pb(Zr,Ti)O
3
) or SBT (SrBi
2
(Ta,Nb)
2
O
9
)
In the case of a high-dielectric film such as a Ta
2
O
5
film or a ferroelectric film, it is characteristic that film formation process includes a process conducted in an oxidizing atmosphere. Further, it is generally thought essential to apply a thermal annealing process in an oxidizing atmosphere for compensating for oxygen defects that are formed in the film.
In the case of forming a Ta
2
O
5
film by a CVD process, for example, the deposition is conducted in a 100% oxygen atmosphere or reduced pressure oxygen atmosphere at the substrate temperature of about 450° C. Thereafter, crystallization and oxygen compensation process are conducted in an oxygen atmosphere at the temperature of 650° C. A similar process is required also in the case of depositing a ferroelectric film such as a PZT film or a SBT film.
Because of this reason, the DRAMs having a high-dielectric capacitor uses Pt, or Ru or Ir, for the lower electrode, wherein it should be noted that Pt is less susceptible to oxidation while Ru or Ir forms a conductive oxide when oxidized.
However, such a high-temperature thermal process conducted in an oxidizing atmosphere can still cause the problem that oxygen in the atmosphere or in the capacitor insulation film
17
b
may reach the polysilicon plug
16
B after penetrating through the lower electrode
17
a
. When this takes place, there is caused oxidation in the polysilicon plug
16
B, while such an oxidation of the polysilicon plug
16
B causes an increase of contact resistance and resultant decrease of the operational speed of the device. Further, such an oxidation of the polysilicon plug
16
B causes another serious problem that a parasitic capacitor having a small capacitance is inserted in series to the high-dielectric capacitor when viewed in the equivalent circuit diagram. When this takes place, the increase of the capacitance of the memory cell capacitor
17
, achieved by the use of the high-dielectric capacitor, is canceled out.
In order to suppress the penetration of oxygen into the contact plug associated with such a thermal annealing process in the oxidizing atmosphere, it has been proposed to use a conductive TiSiN film that contains Ti, Si and N. A TiSiN film is actually a TiN film containing Si, wherein incorporation of Si into a TiN with appropriate amount changes the film structure to an amorphous state and the amorphous film thus obtained blocks the penetration of oxygen effectively.
Even in the case such an amorphous TiSiN film is used, however, it has been difficult to block the penetration of oxygen in the case the thermal processing is conducted at the temperature exceeding 600° C. in an oxygen atmosphere, as in the case of forming the high-dielectric film such as a Ta
2
O
5
film.
SUMMARY OF THE INVENTION
Accordingly, it is a general object of the present invention to provide a novel and useful film forming method and a film forming apparatus wherein the foregoing problems are eliminated.
Another object of the present invention is to provide a film forming method of a conductive film effective for an oxygen barrier by a CVD process, as well as to provide an apparatus for forming such a conductive film.
Another object of the present invention is to provide a method of forming a conductive film containing Ti, Si and N on a substrate by supplying a gaseous source of Ti, a gaseous source of Si and a gaseous source of N, comprising:
a first step of supplying said gaseous source of Ti, said gaseous source of Si and said gaseous source of N to a surface of said substrate simultaneously to grow said conductive film; and
a second step of supplying said gaseous source of Ti, said gaseous source of Si and said gaseous source of N to said surface of said substrate in a state that a flow rate of said gaseous source of Ti is reduced to grow said conductive film further,
wherein said first step and said second step are conducted alternately.
Another object of the present invention is to provide a method of forming a conductive film containing Ti, Si and N on a substrate by supplying a gaseous source of Ti, a gaseous source of Si and a gaseous source of N, comprising the step of:
supplying said gaseous source of Ti, said gaseous source of Si and said gaseous source of N to a surface of said substrate simultaneously,
wherein a partial pressure of said Ti gaseous source is increased and decreased repeatedly and alternately.
Another object of the present invention is to provide a method of fabricating a semiconductor device, said semiconductor device comprising a substrate carry
Kawano Yumiko
Shimogaki Yukihiro
Meeks Timothy
Pillsbury & Winthrop LLP
Tokyo Electron Limited
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