Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Total dielectric isolation
Patent
1995-10-23
1998-07-14
Fourson, George R.
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Total dielectric isolation
H01L 2176
Patent
active
057803528
ABSTRACT:
A method of forming an isolation oxide (30) on a silicon-on-insulator (SOI) substrate (21) includes disposing a mask layer (26, 27) over a region of a silicon layer (24) of the SOI substrate (21). The isolation oxide (30) is grown in a different region (28) of the silicon layer (24). The isolation oxide (30) is grown to a depth (32) within the silicon layer (24) of less than or equal to a thickness (29) of the silicon layer (24). After removing the mask layer (26, 27), the isolation oxide (30) is further grown in the different region (28) of the silicon layer (24) such that the isolation oxide (30) is coupled to a buried electrically insulating layer (23) within the SOI substrate (21). The buried electrically insulating layer (23) and the isolation oxide (30) electrically isolate an active region (43) of a semiconductor device (20).
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Foerstner Juergen
Huang Wen-Ling Margaret
Park Heemyong
Racanelli Marco
Chen George C.
Fourson George R.
Motorola Inc.
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